mmu_context.h 3.74 KB
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/*
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 *  arch/arm/include/asm/mmu_context.h
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 *
 *  Copyright (C) 1996 Russell King.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 *  Changelog:
 *   27-06-1996	RMK	Created
 */
#ifndef __ASM_ARM_MMU_CONTEXT_H
#define __ASM_ARM_MMU_CONTEXT_H

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#include <linux/compiler.h>
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#include <linux/sched.h>
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#include <asm/cacheflush.h>
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#include <asm/cachetype.h>
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#include <asm/proc-fns.h>
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#include <asm/smp_plat.h>
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#include <asm-generic/mm_hooks.h>
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void __check_vmalloc_seq(struct mm_struct *mm);
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#ifdef CONFIG_CPU_HAS_ASID
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void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk);
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#define init_new_context(tsk,mm)	({ atomic64_set(&mm->context.id, 0); 0; })
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#ifdef CONFIG_ARM_ERRATA_798181
void a15_erratum_get_cpumask(int this_cpu, struct mm_struct *mm,
			     cpumask_t *mask);
#else  /* !CONFIG_ARM_ERRATA_798181 */
static inline void a15_erratum_get_cpumask(int this_cpu, struct mm_struct *mm,
					   cpumask_t *mask)
{
}
#endif /* CONFIG_ARM_ERRATA_798181 */
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#else	/* !CONFIG_CPU_HAS_ASID */

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#ifdef CONFIG_MMU

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static inline void check_and_switch_context(struct mm_struct *mm,
					    struct task_struct *tsk)
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{
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	if (unlikely(mm->context.vmalloc_seq != init_mm.context.vmalloc_seq))
		__check_vmalloc_seq(mm);
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	if (irqs_disabled())
		/*
		 * cpu_switch_mm() needs to flush the VIVT caches. To avoid
		 * high interrupt latencies, defer the call and continue
		 * running with the old mm. Since we only support UP systems
		 * on non-ASID CPUs, the old mm will remain valid until the
		 * finish_arch_post_lock_switch() call.
		 */
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		mm->context.switch_pending = 1;
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	else
		cpu_switch_mm(mm->pgd, mm);
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}

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#define finish_arch_post_lock_switch \
	finish_arch_post_lock_switch
static inline void finish_arch_post_lock_switch(void)
{
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	struct mm_struct *mm = current->mm;

	if (mm && mm->context.switch_pending) {
		/*
		 * Preemption must be disabled during cpu_switch_mm() as we
		 * have some stateful cache flush implementations. Check
		 * switch_pending again in case we were preempted and the
		 * switch to this mm was already done.
		 */
		preempt_disable();
		if (mm->context.switch_pending) {
			mm->context.switch_pending = 0;
			cpu_switch_mm(mm->pgd, mm);
		}
		preempt_enable_no_resched();
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	}
}
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#endif	/* CONFIG_MMU */

#define init_new_context(tsk,mm)	0
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#endif	/* CONFIG_CPU_HAS_ASID */
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#define destroy_context(mm)		do { } while(0)
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#define activate_mm(prev,next)		switch_mm(prev, next, NULL)
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/*
 * This is called when "tsk" is about to enter lazy TLB mode.
 *
 * mm:  describes the currently active mm context
 * tsk: task which is entering lazy tlb
 * cpu: cpu number which is entering lazy tlb
 *
 * tsk->mm will be NULL
 */
static inline void
enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
{
}

/*
 * This is the actual mm switch as far as the scheduler
 * is concerned.  No registers are touched.  We avoid
 * calling the CPU specific function when the mm hasn't
 * actually changed.
 */
static inline void
switch_mm(struct mm_struct *prev, struct mm_struct *next,
	  struct task_struct *tsk)
{
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#ifdef CONFIG_MMU
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	unsigned int cpu = smp_processor_id();

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	/*
	 * __sync_icache_dcache doesn't broadcast the I-cache invalidation,
	 * so check for possible thread migration and invalidate the I-cache
	 * if we're new to this CPU.
	 */
	if (cache_ops_need_broadcast() &&
	    !cpumask_empty(mm_cpumask(next)) &&
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	    !cpumask_test_cpu(cpu, mm_cpumask(next)))
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		__flush_icache_all();
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	if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next)) || prev != next) {
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		check_and_switch_context(next, tsk);
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		if (cache_is_vivt())
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			cpumask_clear_cpu(cpu, mm_cpumask(prev));
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	}
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#endif
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}

#define deactivate_mm(tsk,mm)	do { } while (0)

#endif