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xenomai
ipipe-arm
Commits
375eac62
Commit
375eac62
authored
Dec 10, 2017
by
Gilles Chanteperdrix
Committed by
Philippe Gerum
Nov 08, 2019
Browse files
ARM: omap4/wakeupgen: enable interrupt pipelining
parent
0429d802
Changes
1
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Inline
Side-by-side
arch/arm/mach-omap2/omap-wakeupgen.c
View file @
375eac62
...
...
@@ -55,7 +55,7 @@
static
void
__iomem
*
wakeupgen_base
;
static
void
__iomem
*
sar_base
;
static
DEFINE_RAW_SPINLOCK
(
wakeupgen_lock
);
static
IPIPE_
DEFINE_RAW_SPINLOCK
(
wakeupgen_lock
);
static
unsigned
int
irq_target_cpu
[
MAX_IRQS
];
static
unsigned
int
irq_banks
=
DEFAULT_NR_REG_BANKS
;
static
unsigned
int
max_irqs
=
DEFAULT_IRQS
;
...
...
@@ -187,6 +187,30 @@ static int wakeupgen_irq_set_type(struct irq_data *d, unsigned int type)
return
irq_chip_set_type_parent
(
d
,
type
);
}
#ifdef CONFIG_IPIPE
static
void
wakeupgen_hold
(
struct
irq_data
*
d
)
{
unsigned
long
flags
;
raw_spin_lock_irqsave
(
&
wakeupgen_lock
,
flags
);
_wakeupgen_clear
(
d
->
hwirq
,
irq_target_cpu
[
d
->
hwirq
]);
raw_spin_unlock_irqrestore
(
&
wakeupgen_lock
,
flags
);
irq_chip_hold_parent
(
d
);
}
static
void
wakeupgen_release
(
struct
irq_data
*
d
)
{
unsigned
long
flags
;
raw_spin_lock_irqsave
(
&
wakeupgen_lock
,
flags
);
_wakeupgen_set
(
d
->
hwirq
,
irq_target_cpu
[
d
->
hwirq
]);
raw_spin_unlock_irqrestore
(
&
wakeupgen_lock
,
flags
);
irq_chip_release_parent
(
d
);
}
#endif
#ifdef CONFIG_HOTPLUG_CPU
static
DEFINE_PER_CPU
(
u32
[
MAX_NR_REG_BANKS
],
irqmasks
);
...
...
@@ -479,9 +503,13 @@ static struct irq_chip wakeupgen_chip = {
.
irq_eoi
=
irq_chip_eoi_parent
,
.
irq_mask
=
wakeupgen_mask
,
.
irq_unmask
=
wakeupgen_unmask
,
#ifdef CONFIG_IPIPE
.
irq_hold
=
wakeupgen_hold
,
.
irq_release
=
wakeupgen_release
,
#endif
.
irq_retrigger
=
irq_chip_retrigger_hierarchy
,
.
irq_set_type
=
wakeupgen_irq_set_type
,
.
flags
=
IRQCHIP_SKIP_SET_WAKE
|
IRQCHIP_MASK_ON_SUSPEND
,
.
flags
=
IRQCHIP_SKIP_SET_WAKE
|
IRQCHIP_MASK_ON_SUSPEND
|
IRQCHIP_PIPELINE_SAFE
,
#ifdef CONFIG_SMP
.
irq_set_affinity
=
irq_chip_set_affinity_parent
,
#endif
...
...
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