Commit 621a0147 authored by Will Deacon's avatar Will Deacon Committed by Russell King
Browse files

ARM: 7757/1: mm: don't flush icache in switch_mm with hardware broadcasting

When scheduling an mm on a CPU where it hasn't previously been used, we
flush the icache on that CPU so that any code loaded previously on
a different core can be safely executed.

For cores with hardware broadcasting of cache maintenance operations,
this is clearly unnecessary, since the inner-shareable invalidation in
__sync_icache_dcache will affect all CPUs.

This patch conditionalises the icache flush in switch_mm based on
Acked-by: default avatarCatalin Marinas <>
Reported-by: default avatarAlbin Tonnerre <>
Signed-off-by: default avatarWill Deacon <>
Signed-off-by: default avatarRussell King <>
parent 2874865c
......@@ -18,6 +18,7 @@
#include <asm/cacheflush.h>
#include <asm/cachetype.h>
#include <asm/proc-fns.h>
#include <asm/smp_plat.h>
#include <asm-generic/mm_hooks.h>
void __check_vmalloc_seq(struct mm_struct *mm);
......@@ -98,12 +99,16 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
unsigned int cpu = smp_processor_id();
/* check for possible thread migration */
if (!cpumask_empty(mm_cpumask(next)) &&
* __sync_icache_dcache doesn't broadcast the I-cache invalidation,
* so check for possible thread migration and invalidate the I-cache
* if we're new to this CPU.
if (cache_ops_need_broadcast() &&
!cpumask_empty(mm_cpumask(next)) &&
!cpumask_test_cpu(cpu, mm_cpumask(next)))
if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next)) || prev != next) {
check_and_switch_context(next, tsk);
if (cache_is_vivt())
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment