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xenomai
ipipe-arm
Commits
631ca28d
Commit
631ca28d
authored
Dec 03, 2017
by
Gilles Chanteperdrix
Committed by
Philippe Gerum
Nov 08, 2019
Browse files
ARM: imx/avic: ipipe: enable interrupt pipelining
parent
faeb50ca
Changes
1
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Inline
Side-by-side
arch/arm/mach-imx/avic.c
View file @
631ca28d
...
...
@@ -148,6 +148,10 @@ static __init void avic_init_gc(int idx, unsigned int irq_start)
ct
->
chip
.
irq_mask
=
irq_gc_mask_clr_bit
;
ct
->
chip
.
irq_unmask
=
irq_gc_mask_set_bit
;
ct
->
chip
.
irq_ack
=
irq_gc_mask_clr_bit
;
#ifdef CONFIG_IPIPE
ct
->
chip
.
irq_mask_ack
=
irq_gc_mask_clr_bit
;
ct
->
chip
.
flags
=
IRQCHIP_PIPELINE_SAFE
;
#endif
/* CONFIG_IPIPE */
ct
->
chip
.
irq_set_wake
=
irq_gc_set_wake
;
ct
->
chip
.
irq_suspend
=
avic_irq_suspend
;
ct
->
chip
.
irq_resume
=
avic_irq_resume
;
...
...
@@ -166,7 +170,7 @@ static void __exception_irq_entry avic_handle_irq(struct pt_regs *regs)
if
(
nivector
==
0xffff
)
break
;
handle_domain_irq
(
domain
,
nivector
,
regs
);
ipipe_
handle_domain_irq
(
domain
,
nivector
,
regs
);
}
while
(
1
);
}
...
...
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