Commit 9bc088ab authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-microcode-for-linus' of git://

Pull x86 microcode updates from Ingo Molnar:
 "The main changes are a fix early microcode application for
  resume-from-RAM, plus a 32-bit initrd placement fix - by Borislav

* 'x86-microcode-for-linus' of git://
  x86/microcode: Make a couple of symbols static
  x86/microcode/intel: Save pointer to ucode patch for early AP loading
  x86/microcode: Look for the initrd at the correct address on 32-bit
parents e1449007 d7f7dc7b
......@@ -251,7 +251,7 @@ static bool get_builtin_microcode(struct cpio_data *cp, unsigned int family)
void __load_ucode_amd(unsigned int cpuid_1_eax, struct cpio_data *ret)
static void __load_ucode_amd(unsigned int cpuid_1_eax, struct cpio_data *ret)
struct ucode_cpu_info *uci;
struct cpio_data cp;
......@@ -290,6 +290,17 @@ struct cpio_data find_microcode_in_initrd(const char *path, bool use_pa)
return (struct cpio_data){ NULL, 0, "" };
if (initrd_start)
start = initrd_start;
} else {
* The picture with physical addresses is a bit different: we
* need to get the *physical* address to which the ramdisk was
* relocated, i.e., relocated_ramdisk (not initrd_start) and
* since we're running from physical addresses, we need to access
* relocated_ramdisk through its *physical* address too.
u64 *rr = (u64 *)__pa_nodebug(&relocated_ramdisk);
if (*rr)
start = *rr;
return find_cpio_data(path, (void *)start, size, NULL);
......@@ -42,7 +42,7 @@
static const char ucode_path[] = "kernel/x86/microcode/GenuineIntel.bin";
/* Current microcode patch used in early patching on the APs. */
struct microcode_intel *intel_ucode_patch;
static struct microcode_intel *intel_ucode_patch;
static inline bool cpu_signatures_match(unsigned int s1, unsigned int p1,
unsigned int s2, unsigned int p2)
......@@ -166,7 +166,7 @@ static struct ucode_patch *__alloc_microcode_buf(void *data, unsigned int size)
static void save_microcode_patch(void *data, unsigned int size)
struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
struct ucode_patch *iter, *tmp, *p;
struct ucode_patch *iter, *tmp, *p = NULL;
bool prev_found = false;
unsigned int sig, pf;
......@@ -202,6 +202,18 @@ static void save_microcode_patch(void *data, unsigned int size)
list_add_tail(&p->plist, &microcode_cache);
* Save for early loading. On 32-bit, that needs to be a physical
* address as the APs are running from physical addresses, before
* paging has been enabled.
if (p) {
intel_ucode_patch = (struct microcode_intel *)__pa_nodebug(p->data);
intel_ucode_patch = p->data;
static int microcode_sanity_check(void *mc, int print_err)
......@@ -607,6 +619,14 @@ int __init save_microcode_in_initrd_intel(void)
struct ucode_cpu_info uci;
struct cpio_data cp;
* initrd is going away, clear patch ptr. We will scan the microcode one
* last time before jettisoning and save a patch, if found. Then we will
* update that pointer too, with a stable patch address to use when
* resuming the cores.
intel_ucode_patch = NULL;
if (!load_builtin_intel_microcode(&cp))
cp = find_microcode_in_initrd(ucode_path, false);
......@@ -619,9 +639,6 @@ int __init save_microcode_in_initrd_intel(void)
/* initrd is going away, clear patch ptr. */
intel_ucode_patch = NULL;
return 0;
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