Commit ff9a184c authored by Will Deacon's avatar Will Deacon Committed by Russell King
Browse files

ARM: 7400/1: vfp: clear fpscr length and stride bits on entry to sig handler

The ARM PCS mandates that the length and stride bits of the fpscr are
cleared on entry to and return from a public interface. Although signal
handlers run asynchronously with respect to the interrupted function,
the handler itself expects to run as though it has been called like a
normal function.

This patch updates the state mirroring the VFP hardware before entry to
a signal handler so that it adheres to the PCS. Furthermore, we disable
VFP to ensure that we trap on any floating point operation performed by
the signal handler and synchronise the hardware appropriately. A check
is inserted after the signal handler to avoid redundant flushing if VFP
was not used.
Reported-by: default avatarPeter Maydell <>
Signed-off-by: default avatarWill Deacon <>
Signed-off-by: default avatarRussell King <>
parent 2498814f
......@@ -564,6 +564,21 @@ int vfp_preserve_user_clear_hwstate(struct user_vfp __user *ufp,
if (err)
return -EFAULT;
/* Ensure that VFP is disabled. */
* As per the PCS, clear the length and stride bits for function
* entry.
* Disable VFP in the hwstate so that we can detect if it gets
* used.
hwstate->fpexc &= ~FPEXC_EN;
return 0;
......@@ -576,7 +591,12 @@ int vfp_restore_user_hwstate(struct user_vfp __user *ufp,
unsigned long fpexc;
int err = 0;
* If VFP has been used, then disable it to avoid corrupting
* the new thread state.
if (hwstate->fpexc & FPEXC_EN)
* Copy the floating point registers. There can be unused
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