wilc_sdio.c 22.3 KB
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/* ////////////////////////////////////////////////////////////////////////// */
/*  */
/* Copyright (c) Atmel Corporation.  All rights reserved. */
/*  */
/* Module Name:  wilc_sdio.c */
/*  */
/*  */
/* //////////////////////////////////////////////////////////////////////////// */

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#include <linux/string.h>
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#include "wilc_wlan_if.h"
#include "wilc_wlan.h"
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#include "wilc_wfi_netdevice.h"
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#include <linux/mmc/sdio_func.h>
#include <linux/mmc/card.h>
#include <linux/mmc/sdio_ids.h>
#include <linux/mmc/sdio.h>
#include <linux/mmc/host.h>
#include <linux/of_gpio.h>

#define SDIO_MODALIAS "wilc1000_sdio"

#define SDIO_VENDOR_ID_WILC 0x0296
#define SDIO_DEVICE_ID_WILC 0x5347

static const struct sdio_device_id wilc_sdio_ids[] = {
	{ SDIO_DEVICE(SDIO_VENDOR_ID_WILC, SDIO_DEVICE_ID_WILC) },
	{ },
};
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#define WILC_SDIO_BLOCK_SIZE 512
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struct wilc_sdio {
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	bool irq_gpio;
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	u32 block_size;
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	int nint;
#define MAX_NUN_INT_THRPT_ENH2 (5) /* Max num interrupts allowed in registers 0xf7, 0xf8 */
	int has_thrpt_enh3;
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};
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static struct wilc_sdio g_sdio;
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static int sdio_write_reg(struct wilc *wilc, u32 addr, u32 data);
static int sdio_read_reg(struct wilc *wilc, u32 addr, u32 *data);
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static int sdio_init(struct wilc *wilc, bool resume);
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static void wilc_sdio_interrupt(struct sdio_func *func)
{
	sdio_release_host(func);
	wilc_handle_isr(sdio_get_drvdata(func));
	sdio_claim_host(func);
}

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static int wilc_sdio_cmd52(struct wilc *wilc, struct sdio_cmd52 *cmd)
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{
	struct sdio_func *func = container_of(wilc->dev, struct sdio_func, dev);
	int ret;
	u8 data;

	sdio_claim_host(func);

	func->num = cmd->function;
	if (cmd->read_write) {  /* write */
		if (cmd->raw) {
			sdio_writeb(func, cmd->data, cmd->address, &ret);
			data = sdio_readb(func, cmd->address, &ret);
			cmd->data = data;
		} else {
			sdio_writeb(func, cmd->data, cmd->address, &ret);
		}
	} else {        /* read */
		data = sdio_readb(func, cmd->address, &ret);
		cmd->data = data;
	}

	sdio_release_host(func);

	if (ret)
		dev_err(&func->dev, "wilc_sdio_cmd52..failed, err(%d)\n", ret);
	return ret;
}


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static int wilc_sdio_cmd53(struct wilc *wilc, struct sdio_cmd53 *cmd)
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{
	struct sdio_func *func = container_of(wilc->dev, struct sdio_func, dev);
	int size, ret;

	sdio_claim_host(func);

	func->num = cmd->function;
	func->cur_blksize = cmd->block_size;
	if (cmd->block_mode)
		size = cmd->count * cmd->block_size;
	else
		size = cmd->count;

	if (cmd->read_write) {  /* write */
		ret = sdio_memcpy_toio(func, cmd->address,
				       (void *)cmd->buffer, size);
	} else {        /* read */
		ret = sdio_memcpy_fromio(func, (void *)cmd->buffer,
					 cmd->address,  size);
	}

	sdio_release_host(func);

	if (ret)
		dev_err(&func->dev, "wilc_sdio_cmd53..failed, err(%d)\n", ret);

	return ret;
}

static int linux_sdio_probe(struct sdio_func *func,
			    const struct sdio_device_id *id)
{
	struct wilc *wilc;
	int gpio, ret;

	gpio = -1;
	if (IS_ENABLED(CONFIG_WILC1000_HW_OOB_INTR)) {
		gpio = of_get_gpio(func->dev.of_node, 0);
		if (gpio < 0)
			gpio = GPIO_NUM;
	}

	dev_dbg(&func->dev, "Initializing netdev\n");
	ret = wilc_netdev_init(&wilc, &func->dev, HIF_SDIO, gpio,
			     &wilc_hif_sdio);
	if (ret) {
		dev_err(&func->dev, "Couldn't initialize netdev\n");
		return ret;
	}
	sdio_set_drvdata(func, wilc);
	wilc->dev = &func->dev;

	dev_info(&func->dev, "Driver Initializing success\n");
	return 0;
}

static void linux_sdio_remove(struct sdio_func *func)
{
	wilc_netdev_cleanup(sdio_get_drvdata(func));
}

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static int sdio_reset(struct wilc *wilc)
{
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	struct sdio_cmd52 cmd;
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	int ret;
	struct sdio_func *func = dev_to_sdio_func(wilc->dev);

	cmd.read_write = 1;
	cmd.function = 0;
	cmd.raw = 0;
	cmd.address = 0x6;
	cmd.data = 0x8;
	ret = wilc_sdio_cmd52(wilc, &cmd);
	if (ret) {
		dev_err(&func->dev, "Fail cmd 52, reset cmd ...\n");
		return ret;
	}
	return 0;
}

static int wilc_sdio_suspend(struct device *dev)
{
	struct sdio_func *func = dev_to_sdio_func(dev);
	struct wilc *wilc = sdio_get_drvdata(func);
	int ret;

	dev_info(dev, "sdio suspend\n");
	chip_wakeup(wilc);

	if (!wilc->suspend_event) {
		wilc_chip_sleep_manually(wilc);
	} else {
		host_sleep_notify(wilc);
		chip_allow_sleep(wilc);
	}

	ret = sdio_reset(wilc);
	if (ret) {
		dev_err(&func->dev, "Fail reset sdio\n");
		return ret;
	}
	sdio_claim_host(func);

	return 0;
}

static int wilc_sdio_resume(struct device *dev)
{
	struct sdio_func *func = dev_to_sdio_func(dev);
	struct wilc *wilc = sdio_get_drvdata(func);

	dev_info(dev, "sdio resume\n");
	sdio_release_host(func);
	chip_wakeup(wilc);
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	sdio_init(wilc, true);
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	if (wilc->suspend_event)
		host_wakeup_notify(wilc);

	chip_allow_sleep(wilc);

	return 0;
}

static const struct dev_pm_ops wilc_sdio_pm_ops = {
	.suspend = wilc_sdio_suspend,
	.resume = wilc_sdio_resume,
};

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static struct sdio_driver wilc1000_sdio_driver = {
	.name		= SDIO_MODALIAS,
	.id_table	= wilc_sdio_ids,
	.probe		= linux_sdio_probe,
	.remove		= linux_sdio_remove,
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	.drv = {
		.pm = &wilc_sdio_pm_ops,
	}
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};
module_driver(wilc1000_sdio_driver,
	      sdio_register_driver,
	      sdio_unregister_driver);
MODULE_LICENSE("GPL");

static int wilc_sdio_enable_interrupt(struct wilc *dev)
{
	struct sdio_func *func = container_of(dev->dev, struct sdio_func, dev);
	int ret = 0;

	sdio_claim_host(func);
	ret = sdio_claim_irq(func, wilc_sdio_interrupt);
	sdio_release_host(func);

	if (ret < 0) {
		dev_err(&func->dev, "can't claim sdio_irq, err(%d)\n", ret);
		ret = -EIO;
	}
	return ret;
}

static void wilc_sdio_disable_interrupt(struct wilc *dev)
{
	struct sdio_func *func = container_of(dev->dev, struct sdio_func, dev);
	int ret;

	dev_dbg(&func->dev, "wilc_sdio_disable_interrupt IN\n");

	sdio_claim_host(func);
	ret = sdio_release_irq(func);
	if (ret < 0)
		dev_err(&func->dev, "can't release sdio_irq, err(%d)\n", ret);
	sdio_release_host(func);

	dev_info(&func->dev, "wilc_sdio_disable_interrupt OUT\n");
}

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/********************************************
 *
 *      Function 0
 *
 ********************************************/

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static int sdio_set_func0_csa_address(struct wilc *wilc, u32 adr)
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{
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	struct sdio_func *func = dev_to_sdio_func(wilc->dev);
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	struct sdio_cmd52 cmd;
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	int ret;
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	/**
	 *      Review: BIG ENDIAN
	 **/
	cmd.read_write = 1;
	cmd.function = 0;
	cmd.raw = 0;
	cmd.address = 0x10c;
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	cmd.data = (u8)adr;
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	ret = wilc_sdio_cmd52(wilc, &cmd);
	if (ret) {
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		dev_err(&func->dev, "Failed cmd52, set 0x10c data...\n");
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		goto _fail_;
	}

	cmd.address = 0x10d;
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	cmd.data = (u8)(adr >> 8);
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	ret = wilc_sdio_cmd52(wilc, &cmd);
	if (ret) {
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		dev_err(&func->dev, "Failed cmd52, set 0x10d data...\n");
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		goto _fail_;
	}

	cmd.address = 0x10e;
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	cmd.data = (u8)(adr >> 16);
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	ret = wilc_sdio_cmd52(wilc, &cmd);
	if (ret) {
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		dev_err(&func->dev, "Failed cmd52, set 0x10e data...\n");
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		goto _fail_;
	}

	return 1;
_fail_:
	return 0;
}

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static int sdio_set_func0_block_size(struct wilc *wilc, u32 block_size)
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{
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	struct sdio_func *func = dev_to_sdio_func(wilc->dev);
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	struct sdio_cmd52 cmd;
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	int ret;
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	cmd.read_write = 1;
	cmd.function = 0;
	cmd.raw = 0;
	cmd.address = 0x10;
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	cmd.data = (u8)block_size;
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	ret = wilc_sdio_cmd52(wilc, &cmd);
	if (ret) {
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		dev_err(&func->dev, "Failed cmd52, set 0x10 data...\n");
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		goto _fail_;
	}

	cmd.address = 0x11;
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	cmd.data = (u8)(block_size >> 8);
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	ret = wilc_sdio_cmd52(wilc, &cmd);
	if (ret) {
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		dev_err(&func->dev, "Failed cmd52, set 0x11 data...\n");
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		goto _fail_;
	}

	return 1;
_fail_:
	return 0;
}

/********************************************
 *
 *      Function 1
 *
 ********************************************/

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static int sdio_set_func1_block_size(struct wilc *wilc, u32 block_size)
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{
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	struct sdio_func *func = dev_to_sdio_func(wilc->dev);
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	struct sdio_cmd52 cmd;
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	int ret;
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	cmd.read_write = 1;
	cmd.function = 0;
	cmd.raw = 0;
	cmd.address = 0x110;
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	cmd.data = (u8)block_size;
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	ret = wilc_sdio_cmd52(wilc, &cmd);
	if (ret) {
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		dev_err(&func->dev, "Failed cmd52, set 0x110 data...\n");
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		goto _fail_;
	}
	cmd.address = 0x111;
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	cmd.data = (u8)(block_size >> 8);
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	ret = wilc_sdio_cmd52(wilc, &cmd);
	if (ret) {
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		dev_err(&func->dev, "Failed cmd52, set 0x111 data...\n");
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		goto _fail_;
	}

	return 1;
_fail_:
	return 0;
}

/********************************************
 *
 *      Sdio interfaces
 *
 ********************************************/
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static int sdio_write_reg(struct wilc *wilc, u32 addr, u32 data)
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{
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	struct sdio_func *func = dev_to_sdio_func(wilc->dev);
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	int ret;
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	data = cpu_to_le32(data);
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	if ((addr >= 0xf0) && (addr <= 0xff)) {
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		struct sdio_cmd52 cmd;
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		cmd.read_write = 1;
		cmd.function = 0;
		cmd.raw = 0;
		cmd.address = addr;
		cmd.data = data;
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		ret = wilc_sdio_cmd52(wilc, &cmd);
		if (ret) {
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			dev_err(&func->dev,
				"Failed cmd 52, read reg (%08x) ...\n", addr);
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			goto _fail_;
		}
	} else {
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		struct sdio_cmd53 cmd;
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		/**
		 *      set the AHB address
		 **/
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		if (!sdio_set_func0_csa_address(wilc, addr))
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			goto _fail_;

		cmd.read_write = 1;
		cmd.function = 0;
		cmd.address = 0x10f;
		cmd.block_mode = 0;
		cmd.increment = 1;
		cmd.count = 4;
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		cmd.buffer = (u8 *)&data;
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		cmd.block_size = g_sdio.block_size; /* johnny : prevent it from setting unexpected value */
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		ret = wilc_sdio_cmd53(wilc, &cmd);
		if (ret) {
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			dev_err(&func->dev,
				"Failed cmd53, write reg (%08x)...\n", addr);
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			goto _fail_;
		}
	}

	return 1;

_fail_:

	return 0;
}

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static int sdio_write(struct wilc *wilc, u32 addr, u8 *buf, u32 size)
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{
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	struct sdio_func *func = dev_to_sdio_func(wilc->dev);
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	u32 block_size = g_sdio.block_size;
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	struct sdio_cmd53 cmd;
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	int nblk, nleft, ret;
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	cmd.read_write = 1;
	if (addr > 0) {
		/**
		 *      has to be word aligned...
		 **/
		if (size & 0x3) {
			size += 4;
			size &= ~0x3;
		}

		/**
		 *      func 0 access
		 **/
		cmd.function = 0;
		cmd.address = 0x10f;
	} else {
		/**
		 *      has to be word aligned...
		 **/
		if (size & 0x3) {
			size += 4;
			size &= ~0x3;
		}

		/**
		 *      func 1 access
		 **/
		cmd.function = 1;
		cmd.address = 0;
	}

	nblk = size / block_size;
	nleft = size % block_size;

	if (nblk > 0) {
		cmd.block_mode = 1;
		cmd.increment = 1;
		cmd.count = nblk;
		cmd.buffer = buf;
		cmd.block_size = block_size;
		if (addr > 0) {
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			if (!sdio_set_func0_csa_address(wilc, addr))
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				goto _fail_;
		}
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		ret = wilc_sdio_cmd53(wilc, &cmd);
		if (ret) {
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			dev_err(&func->dev,
				"Failed cmd53 [%x], block send...\n", addr);
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			goto _fail_;
		}
		if (addr > 0)
			addr += nblk * block_size;
		buf += nblk * block_size;
	}

	if (nleft > 0) {
		cmd.block_mode = 0;
		cmd.increment = 1;
		cmd.count = nleft;
		cmd.buffer = buf;

		cmd.block_size = block_size; /* johnny : prevent it from setting unexpected value */

		if (addr > 0) {
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			if (!sdio_set_func0_csa_address(wilc, addr))
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				goto _fail_;
		}
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		ret = wilc_sdio_cmd53(wilc, &cmd);
		if (ret) {
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			dev_err(&func->dev,
				"Failed cmd53 [%x], bytes send...\n", addr);
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			goto _fail_;
		}
	}

	return 1;

_fail_:

	return 0;
}

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static int sdio_read_reg(struct wilc *wilc, u32 addr, u32 *data)
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{
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	struct sdio_func *func = dev_to_sdio_func(wilc->dev);
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	int ret;
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	if ((addr >= 0xf0) && (addr <= 0xff)) {
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		struct sdio_cmd52 cmd;
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		cmd.read_write = 0;
		cmd.function = 0;
		cmd.raw = 0;
		cmd.address = addr;
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		ret = wilc_sdio_cmd52(wilc, &cmd);
		if (ret) {
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			dev_err(&func->dev,
				"Failed cmd 52, read reg (%08x) ...\n", addr);
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			goto _fail_;
		}
		*data = cmd.data;
	} else {
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		struct sdio_cmd53 cmd;
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		if (!sdio_set_func0_csa_address(wilc, addr))
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			goto _fail_;

		cmd.read_write = 0;
		cmd.function = 0;
		cmd.address = 0x10f;
		cmd.block_mode = 0;
		cmd.increment = 1;
		cmd.count = 4;
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		cmd.buffer = (u8 *)data;
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		cmd.block_size = g_sdio.block_size; /* johnny : prevent it from setting unexpected value */
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		ret = wilc_sdio_cmd53(wilc, &cmd);
		if (ret) {
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			dev_err(&func->dev,
				"Failed cmd53, read reg (%08x)...\n", addr);
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			goto _fail_;
		}
	}

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	*data = cpu_to_le32(*data);
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	return 1;

_fail_:

	return 0;
}

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static int sdio_read(struct wilc *wilc, u32 addr, u8 *buf, u32 size)
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{
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	struct sdio_func *func = dev_to_sdio_func(wilc->dev);
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	u32 block_size = g_sdio.block_size;
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	struct sdio_cmd53 cmd;
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	int nblk, nleft, ret;
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	cmd.read_write = 0;
	if (addr > 0) {
		/**
		 *      has to be word aligned...
		 **/
		if (size & 0x3) {
			size += 4;
			size &= ~0x3;
		}

		/**
		 *      func 0 access
		 **/
		cmd.function = 0;
		cmd.address = 0x10f;
	} else {
		/**
		 *      has to be word aligned...
		 **/
		if (size & 0x3) {
			size += 4;
			size &= ~0x3;
		}

		/**
		 *      func 1 access
		 **/
		cmd.function = 1;
		cmd.address = 0;
	}

	nblk = size / block_size;
	nleft = size % block_size;

	if (nblk > 0) {
		cmd.block_mode = 1;
		cmd.increment = 1;
		cmd.count = nblk;
		cmd.buffer = buf;
		cmd.block_size = block_size;
		if (addr > 0) {
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			if (!sdio_set_func0_csa_address(wilc, addr))
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				goto _fail_;
		}
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		ret = wilc_sdio_cmd53(wilc, &cmd);
		if (ret) {
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			dev_err(&func->dev,
				"Failed cmd53 [%x], block read...\n", addr);
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			goto _fail_;
		}
		if (addr > 0)
			addr += nblk * block_size;
		buf += nblk * block_size;
	}       /* if (nblk > 0) */

	if (nleft > 0) {
		cmd.block_mode = 0;
		cmd.increment = 1;
		cmd.count = nleft;
		cmd.buffer = buf;

		cmd.block_size = block_size; /* johnny : prevent it from setting unexpected value */

		if (addr > 0) {
641
			if (!sdio_set_func0_csa_address(wilc, addr))
642
643
				goto _fail_;
		}
644
645
		ret = wilc_sdio_cmd53(wilc, &cmd);
		if (ret) {
646
647
			dev_err(&func->dev,
				"Failed cmd53 [%x], bytes read...\n", addr);
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
			goto _fail_;
		}
	}

	return 1;

_fail_:

	return 0;
}

/********************************************
 *
 *      Bus interfaces
 *
 ********************************************/

665
static int sdio_deinit(struct wilc *wilc)
666
667
668
669
{
	return 1;
}

670
static int sdio_init(struct wilc *wilc, bool resume)
671
{
672
	struct sdio_func *func = dev_to_sdio_func(wilc->dev);
673
	struct sdio_cmd52 cmd;
674
	int loop, ret;
675
	u32 chipid;
676

677
	if (!resume) {
678
		memset(&g_sdio, 0, sizeof(struct wilc_sdio));
679
		g_sdio.irq_gpio = wilc->dev_irq_num;
680
	}
681
682
683
684
685
686
687
688
689

	/**
	 *      function 0 csa enable
	 **/
	cmd.read_write = 1;
	cmd.function = 0;
	cmd.raw = 1;
	cmd.address = 0x100;
	cmd.data = 0x80;
690
691
	ret = wilc_sdio_cmd52(wilc, &cmd);
	if (ret) {
692
		dev_err(&func->dev, "Fail cmd 52, enable csa...\n");
693
694
695
696
697
698
		goto _fail_;
	}

	/**
	 *      function 0 block size
	 **/
699
	if (!sdio_set_func0_block_size(wilc, WILC_SDIO_BLOCK_SIZE)) {
700
		dev_err(&func->dev, "Fail cmd 52, set func 0 block size...\n");
701
702
703
704
705
706
707
708
709
710
711
712
		goto _fail_;
	}
	g_sdio.block_size = WILC_SDIO_BLOCK_SIZE;

	/**
	 *      enable func1 IO
	 **/
	cmd.read_write = 1;
	cmd.function = 0;
	cmd.raw = 1;
	cmd.address = 0x2;
	cmd.data = 0x2;
713
714
	ret = wilc_sdio_cmd52(wilc, &cmd);
	if (ret) {
715
716
		dev_err(&func->dev,
			"Fail cmd 52, set IOE register...\n");
717
718
719
720
721
722
723
724
725
726
727
728
729
		goto _fail_;
	}

	/**
	 *      make sure func 1 is up
	 **/
	cmd.read_write = 0;
	cmd.function = 0;
	cmd.raw = 0;
	cmd.address = 0x3;
	loop = 3;
	do {
		cmd.data = 0;
730
731
		ret = wilc_sdio_cmd52(wilc, &cmd);
		if (ret) {
732
733
			dev_err(&func->dev,
				"Fail cmd 52, get IOR register...\n");
734
735
736
737
738
739
740
			goto _fail_;
		}
		if (cmd.data == 0x2)
			break;
	} while (loop--);

	if (loop <= 0) {
741
		dev_err(&func->dev, "Fail func 1 is not ready...\n");
742
743
744
745
746
747
		goto _fail_;
	}

	/**
	 *      func 1 is ready, set func 1 block size
	 **/
748
	if (!sdio_set_func1_block_size(wilc, WILC_SDIO_BLOCK_SIZE)) {
749
		dev_err(&func->dev, "Fail set func 1 block size...\n");
750
751
752
753
754
755
756
757
758
759
760
		goto _fail_;
	}

	/**
	 *      func 1 interrupt enable
	 **/
	cmd.read_write = 1;
	cmd.function = 0;
	cmd.raw = 1;
	cmd.address = 0x4;
	cmd.data = 0x3;
761
762
	ret = wilc_sdio_cmd52(wilc, &cmd);
	if (ret) {
763
		dev_err(&func->dev, "Fail cmd 52, set IEN register...\n");
764
765
766
767
768
769
		goto _fail_;
	}

	/**
	 *      make sure can read back chip id correctly
	 **/
770
771
772
773
774
775
776
777
778
779
780
781
	if (!resume) {
		if (!sdio_read_reg(wilc, 0x1000, &chipid)) {
			dev_err(&func->dev, "Fail cmd read chip id...\n");
			goto _fail_;
		}
		dev_err(&func->dev, "chipid (%08x)\n", chipid);
		if ((chipid & 0xfff) > 0x2a0)
			g_sdio.has_thrpt_enh3 = 1;
		else
			g_sdio.has_thrpt_enh3 = 0;
		dev_info(&func->dev, "has_thrpt_enh3 = %d...\n",
			 g_sdio.has_thrpt_enh3);
782
783
784
785
786
787
788
789
790
	}

	return 1;

_fail_:

	return 0;
}

791
static int sdio_read_size(struct wilc *wilc, u32 *size)
792
{
793
	u32 tmp;
794
	struct sdio_cmd52 cmd;
795
796
797
798

	/**
	 *      Read DMA count in words
	 **/
799
800
801
802
803
	cmd.read_write = 0;
	cmd.function = 0;
	cmd.raw = 0;
	cmd.address = 0xf2;
	cmd.data = 0;
804
	wilc_sdio_cmd52(wilc, &cmd);
805
	tmp = cmd.data;
806

807
808
809
810
811
	/* cmd.read_write = 0; */
	/* cmd.function = 0; */
	/* cmd.raw = 0; */
	cmd.address = 0xf3;
	cmd.data = 0;
812
	wilc_sdio_cmd52(wilc, &cmd);
813
	tmp |= (cmd.data << 8);
814
815
816
817
818

	*size = tmp;
	return 1;
}

819
static int sdio_read_int(struct wilc *wilc, u32 *int_status)
820
{
821
	struct sdio_func *func = dev_to_sdio_func(wilc->dev);
822
	u32 tmp;
823
	struct sdio_cmd52 cmd;
824

825
	sdio_read_size(wilc, &tmp);
826
827
828
829

	/**
	 *      Read IRQ flags
	 **/
830
	if (!g_sdio.irq_gpio) {
831
		int i;
832

833
834
835
		cmd.function = 1;
		cmd.address = 0x04;
		cmd.data = 0;
836
		wilc_sdio_cmd52(wilc, &cmd);
837
838
839
840
841
842
843
844
845
846
847
848
849

		if (cmd.data & BIT(0))
			tmp |= INT_0;
		if (cmd.data & BIT(2))
			tmp |= INT_1;
		if (cmd.data & BIT(3))
			tmp |= INT_2;
		if (cmd.data & BIT(4))
			tmp |= INT_3;
		if (cmd.data & BIT(5))
			tmp |= INT_4;
		if (cmd.data & BIT(6))
			tmp |= INT_5;
850
851
		for (i = g_sdio.nint; i < MAX_NUM_INT; i++) {
			if ((tmp >> (IRG_FLAGS_OFFSET + i)) & 0x1) {
852
853
854
				dev_err(&func->dev,
					"Unexpected interrupt (1) : tmp=%x, data=%x\n",
					tmp, cmd.data);
855
856
857
				break;
			}
		}
858
	} else {
859
		u32 irq_flags;
860
861
862
863
864
865

		cmd.read_write = 0;
		cmd.function = 0;
		cmd.raw = 0;
		cmd.address = 0xf7;
		cmd.data = 0;
866
		wilc_sdio_cmd52(wilc, &cmd);
867
868
869
870
871
872
873
874
875
		irq_flags = cmd.data & 0x1f;
		tmp |= ((irq_flags >> 0) << IRG_FLAGS_OFFSET);
	}

	*int_status = tmp;

	return 1;
}

876
static int sdio_clear_int_ext(struct wilc *wilc, u32 val)
877
{
878
	struct sdio_func *func = dev_to_sdio_func(wilc->dev);
879
880
881
	int ret;

	if (g_sdio.has_thrpt_enh3) {
882
		u32 reg;
883

884
		if (g_sdio.irq_gpio) {
885
			u32 flags;
886

887
			flags = val & (BIT(MAX_NUN_INT_THRPT_ENH2) - 1);
888
			reg = flags;
889
890
		} else {
			reg = 0;
891
892
893
		}
		/* select VMM table 0 */
		if ((val & SEL_VMM_TBL0) == SEL_VMM_TBL0)
894
			reg |= BIT(5);
895
896
		/* select VMM table 1 */
		if ((val & SEL_VMM_TBL1) == SEL_VMM_TBL1)
897
			reg |= BIT(6);
898
899
		/* enable VMM */
		if ((val & EN_VMM) == EN_VMM)
900
			reg |= BIT(7);
901
		if (reg) {
902
			struct sdio_cmd52 cmd;
903

904
905
906
907
908
909
			cmd.read_write = 1;
			cmd.function = 0;
			cmd.raw = 0;
			cmd.address = 0xf8;
			cmd.data = reg;

910
			ret = wilc_sdio_cmd52(wilc, &cmd);
911
			if (ret) {
912
913
914
				dev_err(&func->dev,
					"Failed cmd52, set 0xf8 data (%d) ...\n",
					__LINE__);
915
916
917
918
919
				goto _fail_;
			}

		}
	} else {
920
		if (g_sdio.irq_gpio) {
921
922
			/* see below. has_thrpt_enh2 uses register 0xf8 to clear interrupts. */
			/* Cannot clear multiple interrupts. Must clear each interrupt individually */
923
			u32 flags;
924

925
			flags = val & (BIT(MAX_NUM_INT) - 1);
926
927
928
929
930
931
			if (flags) {
				int i;

				ret = 1;
				for (i = 0; i < g_sdio.nint; i++) {
					if (flags & 1) {
932
						struct sdio_cmd52 cmd;
933

934
935
936
937
						cmd.read_write = 1;
						cmd.function = 0;
						cmd.raw = 0;
						cmd.address = 0xf8;
938
						cmd.data = BIT(i);
939

940
						ret = wilc_sdio_cmd52(wilc, &cmd);
941
						if (ret) {
942
943
944
							dev_err(&func->dev,
								"Failed cmd52, set 0xf8 data (%d) ...\n",
								__LINE__);
945
946
947
948
949
950
951
952
							goto _fail_;
						}

					}
					if (!ret)
						break;
					flags >>= 1;
				}
953
				if (!ret)
954
955
956
					goto _fail_;
				for (i = g_sdio.nint; i < MAX_NUM_INT; i++) {
					if (flags & 1)
957
958
959
						dev_err(&func->dev,
							"Unexpected interrupt cleared %d...\n",
							i);
960
961
962
963
964
965
					flags >>= 1;
				}
			}
		}

		{
966
			u32 vmm_ctl;
967
968
969
970

			vmm_ctl = 0;
			/* select VMM table 0 */
			if ((val & SEL_VMM_TBL0) == SEL_VMM_TBL0)
971
				vmm_ctl |= BIT(0);
972
973
			/* select VMM table 1 */
			if ((val & SEL_VMM_TBL1) == SEL_VMM_TBL1)
974
				vmm_ctl |= BIT(1);
975
976
			/* enable VMM */
			if ((val & EN_VMM) == EN_VMM)
977
				vmm_ctl |= BIT(2);
978
979

			if (vmm_ctl) {
980
				struct sdio_cmd52 cmd;
981
982
983
984
985
986

				cmd.read_write = 1;
				cmd.function = 0;
				cmd.raw = 0;
				cmd.address = 0xf6;
				cmd.data = vmm_ctl;
987
				ret = wilc_sdio_cmd52(wilc, &cmd);
988
				if (ret) {
989
990
991
					dev_err(&func->dev,
						"Failed cmd52, set 0xf6 data (%d) ...\n",
						__LINE__);
992
993
994
995
996
997
998
999
1000
1001
1002
					goto _fail_;
				}
			}
		}
	}

	return 1;
_fail_:
	return 0;
}

1003
static int sdio_sync_ext(struct wilc *wilc, int nint)
1004
{
1005
	struct sdio_func *func = dev_to_sdio_func(wilc->dev);
1006
	u32 reg;
1007
1008

	if (nint > MAX_NUM_INT) {
1009
		dev_err(&func->dev, "Too many interrupts (%d)...\n", nint);
1010
1011
1012
		return 0;
	}
	if (nint > MAX_NUN_INT_THRPT_ENH2) {
1013
1014
		dev_err(&func->dev,
			"Cannot support more than 5 interrupts when has_thrpt_enh2=1.\n");
1015
1016
1017
1018
1019
1020
1021
1022
		return 0;
	}

	g_sdio.nint = nint;

	/**
	 *      Disable power sequencer
	 **/
1023
	if (!sdio_read_reg(wilc, WILC_MISC, &reg)) {
1024
		dev_err(&func->dev, "Failed read misc reg...\n");
1025
1026
1027
		return 0;
	}

1028
	reg &= ~BIT(8);
1029
	if (!sdio_write_reg(wilc, WILC_MISC, reg)) {
1030
		dev_err(&func->dev, "Failed write misc reg...\n");
1031
1032
1033
		return 0;
	}

1034
	if (g_sdio.irq_gpio) {
1035
		u32 reg;
1036
1037
1038
1039
1040
		int ret, i;

		/**
		 *      interrupt pin mux select
		 **/
1041
		ret = sdio_read_reg(wilc, WILC_PIN_MUX_0, &reg);
1042
		if (!ret) {
1043
1044
			dev_err(&func->dev, "Failed read reg (%08x)...\n",
				WILC_PIN_MUX_0);
1045
1046
			return 0;
		}
1047
		reg |= BIT(8);
1048
		ret = sdio_write_reg(wilc, WILC_PIN_MUX_0, reg);
1049
		if (!ret) {
1050
1051
			dev_err(&func->dev, "Failed write reg (%08x)...\n",
				WILC_PIN_MUX_0);
1052
1053
1054
1055
1056
1057
			return 0;
		}

		/**
		 *      interrupt enable
		 **/
1058
		ret = sdio_read_reg(wilc, WILC_INTR_ENABLE, &reg);
1059
		if (!ret) {
1060
1061
			dev_err(&func->dev, "Failed read reg (%08x)...\n",
				WILC_INTR_ENABLE);
1062
1063
1064
			return 0;
		}

1065
		for (i = 0; (i < 5) && (nint > 0); i++, nint--)
1066
			reg |= BIT((27 + i));
1067
		ret = sdio_write_reg(wilc, WILC_INTR_ENABLE, reg);
1068
		if (!ret) {
1069
1070
			dev_err(&func->dev, "Failed write reg (%08x)...\n",
				WILC_INTR_ENABLE);
1071
1072
1073
			return 0;
		}
		if (nint) {
1074
			ret = sdio_read_reg(wilc, WILC_INTR2_ENABLE, &reg);
1075
			if (!ret) {
1076
1077
1078
				dev_err(&func->dev,
					"Failed read reg (%08x)...\n",
					WILC_INTR2_ENABLE);
1079
1080
1081
				return 0;
			}

1082
			for (i = 0; (i < 3) && (nint > 0); i++, nint--)
1083
				reg |= BIT(i);
1084

1085
			ret = sdio_read_reg(wilc, WILC_INTR2_ENABLE, &reg);
1086
			if (!ret) {
1087
1088
1089
				dev_err(&func->dev,
					"Failed write reg (%08x)...\n",
					WILC_INTR2_ENABLE);
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
				return 0;
			}
		}
	}
	return 1;
}

/********************************************
 *
 *      Global sdio HIF function table
 *
 ********************************************/

1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
const struct wilc_hif_func wilc_hif_sdio = {
	.hif_init = sdio_init,
	.hif_deinit = sdio_deinit,
	.hif_read_reg = sdio_read_reg,
	.hif_write_reg = sdio_write_reg,
	.hif_block_rx = sdio_read,
	.hif_block_tx = sdio_write,
	.hif_read_int = sdio_read_int,
	.hif_clear_int_ext = sdio_clear_int_ext,
	.hif_read_size = sdio_read_size,
	.hif_block_tx_ext = sdio_write,
	.hif_block_rx_ext = sdio_read,
	.hif_sync_ext = sdio_sync_ext,
1116
1117
	.enable_interrupt = wilc_sdio_enable_interrupt,
	.disable_interrupt = wilc_sdio_disable_interrupt,
1118
1119
};