Commit 2efda904 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux

Pull thermal management update from Zhang Rui:
 "Summary:

   - of-thermal extension to allow drivers to register and use its
     functionality in a better way, without exploiting thermal core.
     From Lukasz Majewski.

   - Fix a bug in intel_soc_dts_thermal driver which calls a sleep
     function in interrupt handler.  From Maurice Petallo.

   - add a thermal UAPI header file for exporting the thermal generic
     netlink information to user-space.  From Florian Fainelli.

   - First round of refactoring in Exynos driver.  Bartlomiej and Lukasz
     are attempting to make it lean and easier to understand.

   - New thermal driver for Rockchip (rk3288), with support for DT
     thermal.  From Caesar Wang.

   - New thermal driver for Nvidia, Tegra124 SOCTHERM driver, with
     support for DT thermal.  From Mikko Perttunen.

   - New cooling device, based on common clock framework.  From Eduardo
     Valentin.

   - a c...
parents 0b4954c4 2707dbd0
......@@ -5,17 +5,9 @@ Required properties:
- compatible: Should be set to one of the following:
marvell,armada370-thermal
marvell,armada375-thermal
marvell,armada375-z1-thermal
marvell,armada380-thermal
marvell,armadaxp-thermal
Note: As the name suggests, "marvell,armada375-z1-thermal"
applies for the SoC Z1 stepping only. On such stepping
some quirks need to be done and the register offset differs
from the one in the A0 stepping.
The operating system may auto-detect the SoC stepping and
update the compatible and register offsets at runtime.
- reg: Device's register space.
Two entries are expected, see the examples below.
The first one is required for the sensor register;
......
* Temperature Sensor ADC (TSADC) on rockchip SoCs
Required properties:
- compatible : "rockchip,rk3288-tsadc"
- reg : physical base address of the controller and length of memory mapped
region.
- interrupts : The interrupt number to the cpu. The interrupt specifier format
depends on the interrupt controller.
- clocks : Must contain an entry for each entry in clock-names.
- clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for
the peripheral clock.
- resets : Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.
- reset-names : Must include the name "tsadc-apb".
- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
- rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value.
- rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO.
- rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW
1:HIGH.
Exiample:
tsadc: tsadc@ff280000 {
compatible = "rockchip,rk3288-tsadc";
reg = <0xff280000 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
clock-names = "tsadc", "apb_pclk";
resets = <&cru SRST_TSADC>;
reset-names = "tsadc-apb";
pinctrl-names = "default";
pinctrl-0 = <&otp_out>;
#thermal-sensor-cells = <1>;
rockchip,hw-tshut-temp = <95000>;
rockchip,hw-tshut-mode = <0>;
rockchip,hw-tshut-polarity = <0>;
};
Example: referring to thermal sensors:
thermal-zones {
cpu_thermal: cpu_thermal {
polling-delay-passive = <1000>; /* milliseconds */
polling-delay = <5000>; /* milliseconds */
/* sensor ID */
thermal-sensors = <&tsadc 1>;
trips {
cpu_alert0: cpu_alert {
temperature = <70000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
cpu_crit: cpu_crit {
temperature = <90000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert0>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
Tegra124 SOCTHERM thermal management system
The SOCTHERM IP block contains thermal sensors, support for polled
or interrupt-based thermal monitoring, CPU and GPU throttling based
on temperature trip points, and handling external overcurrent
notifications. It is also used to manage emergency shutdown in an
overheating situation.
Required properties :
- compatible : "nvidia,tegra124-soctherm".
- reg : Should contain 1 entry:
- SOCTHERM register set
- interrupts : Defines the interrupt used by SOCTHERM
- clocks : Must contain an entry for each entry in clock-names.
See ../clocks/clock-bindings.txt for details.
- clock-names : Must include the following entries:
- tsensor
- soctherm
- resets : Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.
- reset-names : Must include the following entries:
- soctherm
- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
of this property. See <dt-bindings/thermal/tegra124-soctherm.h> for a
list of valid values when referring to thermal sensors.
Example :
soctherm@0,700e2000 {
compatible = "nvidia,tegra124-soctherm";
reg = <0x0 0x700e2000 0x0 0x1000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
<&tegra_car TEGRA124_CLK_SOC_THERM>;
clock-names = "tsensor", "soctherm";
resets = <&tegra_car 78>;
reset-names = "soctherm";
#thermal-sensor-cells = <1>;
};
Example: referring to thermal sensors :
thermal-zones {
cpu {
polling-delay-passive = <1000>;
polling-delay = <1000>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>;
};
};
......@@ -9516,6 +9516,7 @@ Q: https://patchwork.kernel.org/project/linux-pm/list/
S: Supported
F: drivers/thermal/
F: include/linux/thermal.h
F: include/uapi/linux/thermal.h
F: include/linux/cpu_cooling.h
F: Documentation/devicetree/bindings/thermal/
......
......@@ -1942,4 +1942,48 @@
<&tegra_car TEGRA124_CLK_EXTERN1>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
thermal-zones {
cpu {
trips {
trip@0 {
temperature = <101000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
/* There are currently no cooling maps because there are no cooling devices */
};
};
mem {
trips {
trip@0 {
temperature = <101000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
/* There are currently no cooling maps because there are no cooling devices */
};
};
gpu {
trips {
trip@0 {
temperature = <101000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
/* There are currently no cooling maps because there are no cooling devices */
};
};
};
};
......@@ -4,6 +4,7 @@
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/tegra124-soctherm.h>
#include "skeleton.dtsi"
......@@ -657,6 +658,18 @@
status = "disabled";
};
soctherm: thermal-sensor@0,700e2000 {
compatible = "nvidia,tegra124-soctherm";
reg = <0x0 0x700e2000 0x0 0x1000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
<&tegra_car TEGRA124_CLK_SOC_THERM>;
clock-names = "tsensor", "soctherm";
resets = <&tegra_car 78>;
reset-names = "soctherm";
#thermal-sensor-cells = <1>;
};
ahub@0,70300000 {
compatible = "nvidia,tegra124-ahub";
reg = <0x0 0x70300000 0x0 0x200>,
......@@ -898,6 +911,40 @@
};
};
thermal-zones {
cpu {
polling-delay-passive = <1000>;
polling-delay = <1000>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>;
};
mem {
polling-delay-passive = <1000>;
polling-delay = <1000>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>;
};
gpu {
polling-delay-passive = <1000>;
polling-delay = <1000>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>;
};
pllx {
polling-delay-passive = <1000>;
polling-delay = <1000>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>;
};
};
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13
......
......@@ -177,6 +177,10 @@ static struct attribute *lm75_attrs[] = {
};
ATTRIBUTE_GROUPS(lm75);
static const struct thermal_zone_of_device_ops lm75_of_thermal_ops = {
.get_temp = lm75_read_temp,
};
/*-----------------------------------------------------------------------*/
/* device probe and removal */
......@@ -296,10 +300,9 @@ lm75_probe(struct i2c_client *client, const struct i2c_device_id *id)
if (IS_ERR(data->hwmon_dev))
return PTR_ERR(data->hwmon_dev);
data->tz = thermal_zone_of_sensor_register(data->hwmon_dev,
0,
data->tz = thermal_zone_of_sensor_register(data->hwmon_dev, 0,
data->hwmon_dev,
lm75_read_temp, NULL);
&lm75_of_thermal_ops);
if (IS_ERR(data->tz))
data->tz = NULL;
......
......@@ -486,6 +486,10 @@ static const struct attribute_group ntc_attr_group = {
.attrs = ntc_attributes,
};
static const struct thermal_zone_of_device_ops ntc_of_thermal_ops = {
.get_temp = ntc_read_temp,
};
static int ntc_thermistor_probe(struct platform_device *pdev)
{
const struct of_device_id *of_id =
......@@ -579,7 +583,7 @@ static int ntc_thermistor_probe(struct platform_device *pdev)
pdev_id->name);
data->tz = thermal_zone_of_sensor_register(data->dev, 0, data->dev,
ntc_read_temp, NULL);
&ntc_of_thermal_ops);
if (IS_ERR(data->tz)) {
dev_dbg(&pdev->dev, "Failed to register to thermal fw.\n");
data->tz = NULL;
......
......@@ -158,6 +158,10 @@ ATTRIBUTE_GROUPS(tmp102);
#define TMP102_CONFIG (TMP102_CONF_TM | TMP102_CONF_EM | TMP102_CONF_CR1)
#define TMP102_CONFIG_RD_ONLY (TMP102_CONF_R0 | TMP102_CONF_R1 | TMP102_CONF_AL)
static const struct thermal_zone_of_device_ops tmp102_of_thermal_ops = {
.get_temp = tmp102_read_temp,
};
static int tmp102_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
......@@ -215,7 +219,7 @@ static int tmp102_probe(struct i2c_client *client,
}
tmp102->hwmon_dev = hwmon_dev;
tmp102->tz = thermal_zone_of_sensor_register(hwmon_dev, 0, hwmon_dev,
tmp102_read_temp, NULL);
&tmp102_of_thermal_ops);
if (IS_ERR(tmp102->tz))
tmp102->tz = NULL;
......
......@@ -112,6 +112,18 @@ config CPU_THERMAL
If you want this support, you should say Y here.
config CLOCK_THERMAL
bool "Generic clock cooling support"
depends on COMMON_CLK
depends on PM_OPP
help
This entry implements the generic clock cooling mechanism through
frequency clipping. Typically used to cool off co-processors. The
device that is configured to use this cooling mechanism will be
controlled to reduce clock frequency whenever temperature is high.
If you want this support, you should say Y here.
config THERMAL_EMULATION
bool "Thermal emulation mode support"
help
......@@ -143,6 +155,16 @@ config SPEAR_THERMAL
Enable this to plug the SPEAr thermal sensor driver into the Linux
thermal framework.
config ROCKCHIP_THERMAL
tristate "Rockchip thermal driver"
depends on ARCH_ROCKCHIP
depends on RESET_CONTROLLER
help
Rockchip thermal driver provides support for Temperature sensor
ADC (TS-ADC) found on Rockchip SoCs. It supports one critical
trip point. Cpufreq is used as the cooling device and will throttle
CPUs when the Temperature crosses the passive trip point.
config RCAR_THERMAL
tristate "Renesas R-Car thermal driver"
depends on ARCH_SHMOBILE || COMPILE_TEST
......@@ -185,6 +207,16 @@ config ARMADA_THERMAL
Enable this option if you want to have support for thermal management
controller present in Armada 370 and Armada XP SoC.
config TEGRA_SOCTHERM
tristate "Tegra SOCTHERM thermal management"
depends on ARCH_TEGRA
help
Enable this option for integrated thermal management support on NVIDIA
Tegra124 systems-on-chip. The driver supports four thermal zones
(CPU, GPU, MEM, PLLX). Cooling devices can be bound to the thermal
zones to manage temperatures. This option is also required for the
emergency thermal reset (thermtrip) feature to function.
config DB8500_CPUFREQ_COOLING
tristate "DB8500 cpufreq cooling"
depends on ARCH_U8500
......
......@@ -18,8 +18,12 @@ thermal_sys-$(CONFIG_THERMAL_GOV_USER_SPACE) += user_space.o
# cpufreq cooling
thermal_sys-$(CONFIG_CPU_THERMAL) += cpu_cooling.o
# clock cooling
thermal_sys-$(CONFIG_CLOCK_THERMAL) += clock_cooling.o
# platform thermal drivers
obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
obj-$(CONFIG_ROCKCHIP_THERMAL) += rockchip_thermal.o
obj-$(CONFIG_RCAR_THERMAL) += rcar_thermal.o
obj-$(CONFIG_KIRKWOOD_THERMAL) += kirkwood_thermal.o
obj-y += samsung/
......@@ -34,3 +38,4 @@ obj-$(CONFIG_INTEL_SOC_DTS_THERMAL) += intel_soc_dts_thermal.o
obj-$(CONFIG_TI_SOC_THERMAL) += ti-soc-thermal/
obj-$(CONFIG_INT340X_THERMAL) += int340x_thermal/
obj-$(CONFIG_ST_THERMAL) += st/
obj-$(CONFIG_TEGRA_SOCTHERM) += tegra_soctherm.o
......@@ -35,10 +35,6 @@
#define PMU_TDC0_OTF_CAL_MASK (0x1 << 30)
#define PMU_TDC0_START_CAL_MASK (0x1 << 25)
#define A375_Z1_CAL_RESET_LSB 0x8011e214
#define A375_Z1_CAL_RESET_MSB 0x30a88019
#define A375_Z1_WORKAROUND_BIT BIT(9)
#define A375_UNIT_CONTROL_SHIFT 27
#define A375_UNIT_CONTROL_MASK 0x7
#define A375_READOUT_INVERT BIT(15)
......@@ -124,24 +120,12 @@ static void armada375_init_sensor(struct platform_device *pdev,
struct armada_thermal_priv *priv)
{
unsigned long reg;
bool quirk_needed =
!!of_device_is_compatible(pdev->dev.of_node,
"marvell,armada375-z1-thermal");
if (quirk_needed) {
/* Ensure these registers have the default (reset) values */
writel(A375_Z1_CAL_RESET_LSB, priv->control);
writel(A375_Z1_CAL_RESET_MSB, priv->control + 0x4);
}
reg = readl(priv->control + 4);
reg &= ~(A375_UNIT_CONTROL_MASK << A375_UNIT_CONTROL_SHIFT);
reg &= ~A375_READOUT_INVERT;
reg &= ~A375_HW_RESETn;
if (quirk_needed)
reg |= A375_Z1_WORKAROUND_BIT;
writel(reg, priv->control + 4);
mdelay(20);
......@@ -259,10 +243,6 @@ static const struct of_device_id armada_thermal_id_table[] = {
.compatible = "marvell,armada375-thermal",
.data = &armada375_data,
},
{
.compatible = "marvell,armada375-z1-thermal",
.data = &armada375_data,
},
{
.compatible = "marvell,armada380-thermal",
.data = &armada380_data,
......
/*
* drivers/thermal/clock_cooling.c
*
* Copyright (C) 2014 Eduardo Valentin <edubezval@gmail.com>
*
* Copyright (C) 2013 Texas Instruments Inc.
* Contact: Eduardo Valentin <eduardo.valentin@ti.com>
*
* Highly based on cpu_cooling.c.
* Copyright (C) 2012 Samsung Electronics Co., Ltd(http://www.samsung.com)
* Copyright (C) 2012 Amit Daniel <amit.kachhap@linaro.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*/
#include <linux/clk.h>
#include <linux/cpufreq.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/idr.h>
#include <linux/mutex.h>
#include <linux/pm_opp.h>
#include <linux/slab.h>
#include <linux/thermal.h>
#include <linux/clock_cooling.h>
/**
* struct clock_cooling_device - data for cooling device with clock
* @id: unique integer value corresponding to each clock_cooling_device
* registered.
* @dev: struct device pointer to the device being used to cool off using
* clock frequencies.
* @cdev: thermal_cooling_device pointer to keep track of the
* registered cooling device.
* @clk_rate_change_nb: reference to notifier block used to receive clock
* rate changes.
* @freq_table: frequency table used to keep track of available frequencies.
* @clock_state: integer value representing the current state of clock
* cooling devices.
* @clock_val: integer value representing the absolute value of the clipped
* frequency.
* @clk: struct clk reference used to enforce clock limits.
* @lock: mutex lock to protect this struct.
*
* This structure is required for keeping information of each
* clock_cooling_device registered. In order to prevent corruption of this a
* mutex @lock is used.
*/
struct clock_cooling_device {
int id;
struct device *dev;
struct thermal_cooling_device *cdev;
struct notifier_block clk_rate_change_nb;
struct cpufreq_frequency_table *freq_table;
unsigned long clock_state;
unsigned long clock_val;
struct clk *clk;
struct mutex lock; /* lock to protect the content of this struct */
};
#define to_clock_cooling_device(x) \
container_of(x, struct clock_cooling_device, clk_rate_change_nb)
static DEFINE_IDR(clock_idr);
static DEFINE_MUTEX(cooling_clock_lock);
/**
* clock_cooling_get_idr - function to get an unique id.
* @id: int * value generated by this function.
*
* This function will populate @id with an unique
* id, using the idr API.
*
* Return: 0 on success, an error code on failure.
*/
static int clock_cooling_get_idr(int *id)
{
int ret;
mutex_lock(&cooling_clock_lock);
ret = idr_alloc(&clock_idr, NULL, 0, 0, GFP_KERNEL);
mutex_unlock(&cooling_clock_lock);
if (unlikely(ret < 0))
return ret;
*id = ret;
return 0;
}
/**
* release_idr - function to free the unique id.
* @id: int value representing the unique id.
*/
static void release_idr(int id)
{
mutex_lock(&cooling_clock_lock);
idr_remove(&clock_idr, id);
mutex_unlock(&cooling_clock_lock);
}
/* Below code defines functions to be used for clock as cooling device */
enum clock_cooling_property {
GET_LEVEL,
GET_FREQ,
GET_MAXL,
};
/**
* clock_cooling_get_property - fetch a property of interest for a give cpu.
* @ccdev: clock cooling device reference
* @input: query parameter
* @output: query return
* @property: type of query (frequency, level, max level)
*
* This is the common function to
* 1. get maximum clock cooling states
* 2. translate frequency to cooling state
* 3. translate cooling state to frequency
* Note that the code may be not in good shape
* but it is written in this way in order to:
* a) reduce duplicate code as most of the code can be shared.
* b) make sure the logic is consistent when translating between
* cooling states and frequencies.
*
* Return: 0 on success, -EINVAL when invalid parameters are passed.
*/
static int clock_cooling_get_property(struct clock_cooling_device *ccdev,
unsigned long input,
unsigned long *output,
enum clock_cooling_property property)
{
int i;
unsigned long max_level = 0, level = 0;
unsigned int freq = CPUFREQ_ENTRY_INVALID;
int descend = -1;
struct cpufreq_frequency_table *pos, *table = ccdev->freq_table;
if (!output)
return -EINVAL;
if (!table)
return -EINVAL;
cpufreq_for_each_valid_entry(pos, table) {
/* ignore duplicate entry */
if (freq == pos->frequency)
continue;
/* get the frequency order */
if (freq != CPUFREQ_ENTRY_INVALID && descend == -1)
descend = freq > pos->frequency;
freq = pos->frequency;
max_level++;
}
/* No valid cpu frequency entry */
if (max_level == 0)
return -EINVAL;
/* max_level is an index, not a counter */
max_level--;
/* get max level */
if (property == GET_MAXL) {
*output = max_level;
return 0;
}
if (property == GET_FREQ)
level = descend ? input : (max_level - input);
i = 0;