- 03 Jul, 2017 2 commits
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Keiji Hayashibara authored
Add uniphier-wdt dt-bindings documentation. Signed-off-by:
Keiji Hayashibara <hayashibara.keiji@socionext.com> Acked-by:
Rob Herring <robh@kernel.org> Reviewed-by:
Guenter Roeck <linux@roeck-us.net> Signed-off-by:
Wim Van Sebroeck <wim@iguana.be>
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Steffen Trumtrar authored
Document the reset lines holding the watchdog core in reset. Signed-off-by:
Steffen Trumtrar <s.trumtrar@pengutronix.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Acked-by:
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- 05 Jun, 2017 3 commits
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Yannick Fertre authored
This adds documentation of device tree bindings for the STM32 IWDG (Independent WatchDoG). Signed-off-by:
Yannick Fertre <yannick.fertre@st.com> Acked-by:
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Steve Twiss authored
Add binding information for DA9062 and DA9061 watchdog. Example bindings for both DA9062 and DA9061 devices are added. For the DA9061 device, a fallback compatible line is added as a valid combination of compatible strings. The original binding for DA9062 (only) used to reside inside the Documentation/devicetree/bindings/mfd/da9062.txt MFD document. The da9062-watchdog section was deleted in that file and replaced with a link to the new DA9061/62 binding information stored in this patch. Acked-by:
Steve Twiss <stwiss.opensource@diasemi.com> Reviewed-by:
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Chris Brandt authored
Describe the WDT hardware in the RZ/A series. Signed-off-by:
Chris Brandt <chris.brandt@renesas.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Acked-by:
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- 24 May, 2017 1 commit
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Quentin Schulz authored
Some PHY require to wait for a bit after the reset GPIO has been toggled. This adds support for the DT property `phy-reset-post-delay` which gives the delay in milliseconds to wait after reset. If the DT property is not given, no delay is observed. Post reset delay greater than 1000ms are invalid. Signed-off-by:
Quentin Schulz <quentin.schulz@free-electrons.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Acked-by:
Fugang Duan <fugang.duan@nxp.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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- 23 May, 2017 3 commits
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Daniel Lezcano authored
The hi655x PMIC provides the regulators but also a clock. The latter is missing in the definition, so extend the documentation to include this as well. Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by:
Lee Jones <lee.jones@linaro.org> [Ulf: Split patch and updated changelog] Signed-off-by:
Ulf Hansson <ulf.hansson@linaro.org> Acked-by:
Arnd Bergmann <arnd@arndb.de>
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Ulf Hansson authored
During power off, after the GPIO pin has been asserted, some devices like the Wifi chip from TI, Wl18xx, needs a delay before the host continues with clock gating and turning off regulators as to follow a graceful shutdown sequence. Therefore invent an optional power-off-delay-us DT binding for mmc-pwrseq-simple, to allow us to support this constraint. Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-mmc@vger.kernel.org Signed-off-by:
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Martin Kepplinger authored
The datasheet and application note does not mention an allowed range for the M09_REGISTER_THRESHOLD parameter. One of our customers needs to set lower values than 20 and they seem to work just fine on EDT EP0xx0M09 with T5x06 touch. So, lacking a known lower limit, we increase the range for thresholds, and set the lower limit to 0. The documentation is updated accordingly. Signed-off-by:
Schoefegger Stefan <stefan.schoefegger@ginzinger.com> Signed-off-by:
Manfred Schlaegl <manfred.schlaegl@ginzinger.com> Signed-off-by:
Martin Kepplinger <martin.kepplinger@ginzinger.com> Acked-by:
Dmitry Torokhov <dmitry.torokhov@gmail.com>
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- 22 May, 2017 1 commit
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Linus Walleij authored
This reverts commit 8c58f1a7 . It turns out that applying these generic properties was premature: the properties used in the driver using this are of unclear electrical nature and the subject need to be discussed. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 15 May, 2017 1 commit
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Yisheng Xie authored
After commit 9828282e ("staging: android: ion: Remove old platform support"), the document about devicetree of ion is no need anymore, so just remove it. Signed-off-by:
Yisheng Xie <xieyisheng1@huawei.com> Acked-by:
Laura Abbott <labbott@redhat.com> Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 11 May, 2017 1 commit
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Christophe Leroy authored
This patch updates the binding documentation in accordance with commit 44dd1828 ("mtd: nand: gpio: make nCE GPIO optional") Signed-off-by:
Christophe Leroy <christophe.leroy@c-s.fr> Reported-by:
Brian Norris <computersforpeace@gmail.com> Acked-by:
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- 09 May, 2017 1 commit
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Nicholas Piggin authored
The ibm,powerpc-cpu-features device tree binding describes CPU features with ASCII names and extensible compatibility, privilege, and enablement metadata that allows improved flexibility and compatibility with new hardware. The interface is described in detail in ibm,powerpc-cpu-features.txt in this patch. Currently this code is not enabled by default, and there are no released firmwares that provide the binding. Signed-off-by:
Nicholas Piggin <npiggin@gmail.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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- 03 May, 2017 1 commit
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Christophe Leroy authored
This patch allows the use of IRQ to notify the change of GPIO status on MPC8xx CPM IO ports. This then allows to associate IRQs to GPIOs in the Device Tree. Ex: CPM1_PIO_C: gpio-controller@960 { #gpio-cells = <2>; compatible = "fsl,cpm1-pario-bank-c"; reg = <0x960 0x10>; fsl,cpm1-gpio-irq-mask = <0x0fff>; interrupts = <1 2 6 9 10 11 14 15 23 24 26 31>; interrupt-parent = <&CPM_PIC>; gpio-controller; }; The property 'fsl,cpm1-gpio-irq-mask' defines which of the 16 GPIOs have the associated interrupts defined in the 'interrupts' property. Signed-off-by:Scott Wood <oss@buserror.net>
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- 02 May, 2017 1 commit
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Ludovic Barre authored
This patch adds documentation of device tree bindings for the STM32 QSPI controller. Signed-off-by:
Ludovic Barre <ludovic.barre@st.com> Acked-by:
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- 01 May, 2017 1 commit
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Quentin Schulz authored
The X-Powers AXP20X and AXP22X PMICs can have a battery as power supply. This patch adds the DT binding documentation for the battery power supply which gets various data from the PMIC, such as the battery status (charging, discharging, full, dead), current max limit, current current, battery capacity (in percentage), voltage max and min limits, current voltage and battery capacity (in Ah). Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Acked-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk>
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- 28 Apr, 2017 4 commits
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Viresh Kumar authored
The power-domain provider's #power-domain-cells field is set to 0 and yet the children is using an index to point the power domain. Fix it by removing the index field. Fixes: 70bb510e (dt/bindings / PM/Domains: Update binding for PM domain idle states) Signed-off-by:
Viresh Kumar <viresh.kumar@linaro.org> Acked-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Kishon Vijay Abraham I authored
Update device tree binding documentation of TI's dra7xx PCI controller to include property for enabling unaligned mem access. Signed-off-by:
Kishon Vijay Abraham I <kishon@ti.com> Acked-by:
Bjorn Helgaas <bhelgaas@google.com>
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Kishon Vijay Abraham I authored
Add device tree binding documentation for PCI dra7xx EP mode. Acked-by:
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Kishon Vijay Abraham I authored
Add device tree binding documentation for PCI designware EP mode. Signed-off-by:
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- 27 Apr, 2017 12 commits
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Icenowy Zheng authored
AXP803 have the most regulators in currently supported AXP PMICs. Add info for the regulators in the dt-bindings document. Signed-off-by:
Icenowy Zheng <icenowy@aosc.io> Acked-by:
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Icenowy Zheng authored
AXP803 is a PMIC produced by Shenzhen X-Powers, with either I2C or RSB bus. Add a compatible for it. Signed-off-by:
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Icenowy Zheng authored
In the binding documentation of AXP20X mfd, the compatible strings used to be listed for three per line, which leads to some mess when trying to add AXP803 compatible string (as we have already AXP806 and AXP809 compatibles, which is after AXP803 in ascending order). Make the compatible strings one per line, so that inserting a new compatible string will be directly a new line. Signed-off-by:
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Marek Szyprowski authored
Exynos LPASS requires some clocks to be enabled to make any access to its registers. This patch adds code for handling such clocks. For current set of registers it is enough to keep sfr0_ctrl clock enabled. Till now it worked only because those clocks were enabled by bootloader and driver probe() happened before they were disabled by clock core because of lack of users. Handling those clocks is also needed to make it possible to enable support for audio power domain. This patch requires adding sfr0_ctrl clock to device tree. Signed-off-by:
Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by:
Krzysztof Kozlowski <krzk@kernel.org> Acked-by:
Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by:
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Marek Szyprowski authored
Pad retention should be controlled from pin control driver, so remove it from Exynos LPASS driver. After this change, no more access to PMU regmap is needed, so remove also the code for handling PMU regmap. Signed-off-by:
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Quentin Schulz authored
This patch removes the sun4i touchscreen controller binding documentation since it has been merged with the sun4i GPADC binding documentation. Signed-off-by:
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Quentin Schulz authored
This patch adds documentation for the A33 GPADC binding. Signed-off-by:
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Steve Twiss authored
Extend existing DA9062 binding information to include the DA9061 PMIC for MFD core and regulators. Add a da9062-onkey link to the existing onkey binding file. Add a da9062-thermal link to the new temperature monitoring binding file. Delete the da9062-watchdog section and replace it with a link to the new DA9061/62 binding information file. Acked-by:
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Sean Wang authored
This patch adds description for LED as the sub-module on MT6397/MT6323 multifunction device. Signed-off-by:
Sean Wang <sean.wang@mediatek.com> Signed-off-by:
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Thor Thayer authored
This patch adds documentation for the Altera A10-SR Reset Controller DT bindings. Signed-off-by:
Thor Thayer <thor.thayer@linux.intel.com> Acked-by:
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Milo Kim authored
This patch describes overall binding for TI LMU MFD devices. Signed-off-by:
Milo Kim <milo.kim@ti.com> Acked-by:
Rob Herring <robh+dt@kernel.org> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
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Rask Ingemann Lambertsen authored
commit b101829a029a ("mfd: axp20x: Fix AXP806 access errors on cold boot") was intended to fix the case where a board uses an AXP806 in slave mode, but the boot loader leaves it in master mode for lack of AXP806 support. But now the driver breaks on boards where the PMIC is operating in master mode. To let the device tree describe which mode of operation is needed, this patch introduces a new property "xpowers,master-mode". Fixes: 204ae296 ("mfd: axp20x: Add bindings for AXP806 PMIC") Signed-off-by:Rask Ingemann Lambertsen <rask@formelder.dk> Acked-by:
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- 26 Apr, 2017 3 commits
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Florian Fainelli authored
The described GPIO reset property is applicable to *all* child PHYs. If we have one reset line per PHY present on the MDIO bus, these automatically become properties of the child PHY nodes. Finally, indicate how the RESET pulse width must be defined, which is the maximum value of all individual PHYs RESET pulse widths determined by reading their datasheets. Fixes: 69226896 ("mdio_bus: Issue GPIO RESET to PHYs.") Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com> Reviewed-by:
Roger Quadros <rogerq@ti.com> Signed-off-by:
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olivier moysan authored
This patch adds documentation of device tree bindings for the STM32 SAI ASoC driver. Signed-off-by:
olivier moysan <olivier.moysan@st.com> Signed-off-by:
Mark Brown <broonie@kernel.org>
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John Hsu authored
Add driver for NAU88L24. Signed-off-by:
John Hsu <KCHSU0@nuvoton.com> Signed-off-by:
John Hsu <supercraig0719@gmail.com> Signed-off-by:
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- 25 Apr, 2017 5 commits
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Leif Middelschulte authored
This patch implements consideration of the SPI_READY mode flag as defined in spi.h. It extends the device tree bindings to support the values defined by the reference manual for the DRCTL field. Thus supporting edge-triggered and level-triggered bursts. Signed-off-by:
Leif Middelschulte <Leif.Middelschulte@gmail.com> Signed-off-by:
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Masahiro Yamada authored
The driver sets appropriate DMA mask. Delete the "dma-mask" DT property. See [1] for negative comments for this binding. [1] https://lkml.org/lkml/2016/2/8/57 Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by:
Boris Brezillon <boris.brezillon@free-electrons.com>
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Masahiro Yamada authored
There are various customizable parameters, so several variants for this IP. A generic compatible like "denali,denali-nand-dt" is useless. Moreover, there are multiple things wrong with this string. (Refer to Rob's comment [1]) The "denali,denali-nand-dt" was added by Altera for the SOCFPGA port. Replace it with a more specific string "altr,socfpga-denali-nand". There are no users (in upstream) of the old compatible string. The Denali IP on SOCFPGA incorporates the hardware ECC fixup engine. So, this capability should be associated with the compatible. [1] https://lkml.org/lkml/2016/12/1/450 Signed-off-by:
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Boris Brezillon authored
The old NAND bindings were not exactly describing the hardware topology and were preventing definitions of several NAND chips under the same NAND controller. New bindings address these limitations and should be preferred over the old ones for new SoCs/boards. Old bindings are still supported for backward compatibility but are marked deprecated in the doc. Signed-off-by:
Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by:
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Olimpiu Dejeu authored
Signed-off-by:
Olimpiu Dejeu <olimpiu@arcticsand.com> Acked-by:
Daniel Thompson <daniel.thompson@linaro.org> Signed-off-by:
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