- 07 Mar, 2021 40 commits
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Jan Kiszka authored
When a CPU is unplugged, make sure to drop all per-CPU ipipe timer devices when removing the CPU. Otherwise, we will corrupt the device list when re-registering the host timer on CPU onlining. Signed-off-by:Jan Kiszka <jan.kiszka@siemens.com>
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linux/ipipe_base.h was originally designed to circumvment #include hell by exporting only a subset of core definitions with minimum dependencies to other inner headers. The latest code reorganization fixed this issue in a better way, and linux/ipipe.h is currently the only direct reader of linux/ipipe_base.h, so let's merge both headers back as linux/ipipe.h.
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Jan Kiszka authored
At least one arch, infamous x86, has a difference of NR_syscalls depending on compat vs. native ABI. Account for that by introducing a function that can deliver the currently valid syscall number if an arch implements such a service. In all other cases, this change is functionally no difference. Signed-off-by: -
Jan Kiszka authored
This I-pipe hook reports the desired resumption mode to the subscriber: resume all process tasks or just single-step a particular one? The use case is to enable synchronous stopping / resuming of all head tasks of a ptraced real-time process. Signed-off-by: -
Jan Kiszka authored
A little bit inspired by the kernel's user return notifier, this introduces an I-pipe hook before the kernel jumps back to a userspace context from the root domain. The hook is design to allow a switch back to the head domain, thus will not run through signal/preemption checks when returning from the callback over head. It is guaranteed to fire on return from interrupts and exceptions but may also fire on certain syscall-return paths. The first use case for the hook is resumption of ptraced tasks over head if they were stopped in that domain. This provides just the generic infrastructure, the invocation of __ipipe_notify_user_intreturn as well as the definition of TIP_USERINTRET are architecture-specific. Signed-off-by: -
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__ipipe_migrate_head() should not BUG() unconditionally when failing to schedule out a thread, but rather let the real-time core handle the situation a bit more gracefully.
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Only timers stolen away from the host kernel should be early acked by the pipeline core. Otherwise, the regular IRQ handler associated to the timer would duplicate the action. The IRQ line is left masked, waiting for the IRQ flow handler to unmask it eventually.
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Although we don't want to disable the hardware not to wreck the outstanding timing requests managed by the co-kernel, we should nevertheless notify it about entering the ONESHOT_STOPPED mode, so that it may disable the host tick emulation.
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There is no point in interposing on clock chip handlers for which there was no support originally. In some cases (oneshot_stopped), we may even get a kernel fault, jumping to a NULL address. Interpose on non-NULL original handlers only.
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Although we won't allow disabling the hardware when the clock event logic switches a device to stopped mode - so that we won't affect the timer logic running on the head stage unexpectedly -, we still have to enable the hardware when switched (back) to oneshot mode, since it may have been stopped prior to interposing on the device in ipipe_timer_start(). Failing to do so would leave the hardware shut down for both regular and Xenomai operations, with no mean to bring it up again.
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Once the device was grabbed by ipipe_timer_start(), any pending host tick programmed in the hardware is basically lost, unknown to the co-kernel implementing the proxy handlers. Schedule a host event with the latest target time programmed to have the co-kernel know about the pending tick.
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Handle requests for transitioning to deeper C-states the way Dovetail does, which prevents us from losing the timer when grabbed by a co-kernel, in presence of a CPUIDLE driver.
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Those helpers affect both the real (in CPU) and virtual interrupt states for the root stage, reconciling them.
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At this chance, switch the min_delay_tick value to unsigned long to match the corresponding clockevent definition.
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Drop the legacy support for architectures not enabling the generic clock event framework, which would only provide periodic timing. We don't support any of those archs, and there is no point in running a Xenomai co-kernel on a hardware not capable of handling oneshot timing requests.
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Now that stop_machine() guarantees fully atomic execution of the stop routine via hard interrupt disabling, there is no point in using ipipe_critical_enter/exit() for the same purpose in order to patch the kernel text.
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stop_machine() guarantees that all online CPUs are spinning non-preemptible in a known code location before a subset of them may safely run a stop-context function. This service is typically useful for live patching the kernel code, or changing global memory mappings, so that no activity could run in parallel until the system has returned to a stable state after all stop-context operations have completed. When interrupt pipelining is enabled, we have to provide the same guarantee by restoring hard interrupt disabling where virtualizing the interrupt disable flag would defeat it.
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The lockdep engine will check for the current interrupt state as part of the locking validation process, which must encompass: - the CPU interrupt state - the current pipeline domain - the virtual interrupt disable flag so that we can traverse the tracepoints from any context sanely and safely. In addition trace_hardirqs_on_virt_caller() should be called by the arch-dependent code when tracking the interrupt state before returning to user-space after a kernel entry (exceptions, IRQ). This makes sure that the tracking logic only applies to the root domain, and considers the virtual disable flag exclusively. For instance, the kernel may be entered when interrupts are (only) virtually disabled for the root domain (i.e. stalled), and we should tell the IRQ tracing logic that IRQs are about to be enabled back only if the root domain is unstalled before leaving to user-space. In such a context, the state of the interrupt bit in the CPU would be irrelevant.
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Fix up the PMU controller driver of the Marvell Dove SoC in order to channel interrupts through the interrupt pipeline.
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Fix up Synopsys's PCIE driver in order to channel interrupts through the interrupt pipeline.
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Fix up Altera's PCIE driver in order to channel interrupts through the interrupt pipeline.
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Fix up the pin controller driver of the Allwinner A1x SoCs in order to channel interrupts through the interrupt pipeline.
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Fix up the pin controller driver of the Broadcom 2835 SoC in order to channel interrupts through the interrupt pipeline.
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Fix up the pin controller driver of the Rockchip SoC in order to channel interrupts through the interrupt pipeline.
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Enable the serial driver for raw_printk() output.
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Enable the serial driver for raw_printk() output.
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Enable the serial driver for raw_printk() output.
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Fix up Freescale's general power controller driver in order to channel interrupts through the interrupt pipeline.
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Fix up Broadcom's Generic Set Top Box (Level 2) interrupt controller driver in order to channel interrupts through the interrupt pipeline.
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