Makefile.build 19.6 KB
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# SPDX-License-Identifier: GPL-2.0
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# ==========================================================================
# Building
# ==========================================================================

src := $(obj)

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PHONY := __build
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__build:

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# Init all relevant variables used in kbuild files so
# 1) they have correct type
# 2) they do not inherit any value from the environment
obj-y :=
obj-m :=
lib-y :=
lib-m :=
always :=
targets :=
subdir-y :=
subdir-m :=
EXTRA_AFLAGS   :=
EXTRA_CFLAGS   :=
EXTRA_CPPFLAGS :=
EXTRA_LDFLAGS  :=
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asflags-y  :=
ccflags-y  :=
cppflags-y :=
ldflags-y  :=
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subdir-asflags-y :=
subdir-ccflags-y :=

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# Read auto.conf if it exists, otherwise ignore
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-include include/config/auto.conf
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include scripts/Kbuild.include

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# For backward compatibility check that these variables do not change
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save-cflags := $(CFLAGS)

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# The filename Kbuild has precedence over Makefile
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kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
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kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
include $(kbuild-file)

# If the save-* variables changed error out
ifeq ($(KBUILD_NOPEDANTIC),)
        ifneq ("$(save-cflags)","$(CFLAGS)")
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                $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
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        endif
endif
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include scripts/Makefile.lib

ifdef host-progs
ifneq ($(hostprogs-y),$(host-progs))
$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
hostprogs-y += $(host-progs)
endif
endif

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# Do not include host rules unless needed
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ifneq ($(hostprogs-y)$(hostprogs-m)$(hostlibs-y)$(hostlibs-m)$(hostcxxlibs-y)$(hostcxxlibs-m),)
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include scripts/Makefile.host
endif

ifndef obj
$(warning kbuild: Makefile.build is included improperly)
endif

# ===========================================================================

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ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
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lib-target := $(obj)/lib.a
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obj-y += $(obj)/lib-ksyms.o
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endif

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ifneq ($(strip $(obj-y) $(need-builtin)),)
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builtin-target := $(obj)/built-in.o
endif

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modorder-target := $(obj)/modules.order

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# We keep a list of all modules in $(MODVERDIR)

__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
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	 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
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	 $(subdir-ym) $(always)
	@:

# Linus' kernel sanity checking tool
ifneq ($(KBUILD_CHECKSRC),0)
  ifeq ($(KBUILD_CHECKSRC),2)
    quiet_cmd_force_checksrc = CHECK   $<
          cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  else
      quiet_cmd_checksrc     = CHECK   $<
            cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  endif
endif

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ifneq ($(KBUILD_ENABLE_EXTRA_GCC_CHECKS),)
  cmd_checkdoc = $(srctree)/scripts/kernel-doc -none $< ;
endif

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# Do section mismatch analysis for each module/built-in.o
ifdef CONFIG_DEBUG_SECTION_MISMATCH
  cmd_secanalysis = ; scripts/mod/modpost $@
endif
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# Compile C sources (.c)
# ---------------------------------------------------------------------------

# Default is built-in, unless we know otherwise
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modkern_cflags =                                          \
	$(if $(part-of-module),                           \
		$(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
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		$(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
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quiet_modtag := $(empty)   $(empty)

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$(real-objs-m)        : part-of-module := y
$(real-objs-m:.o=.i)  : part-of-module := y
$(real-objs-m:.o=.s)  : part-of-module := y
$(real-objs-m:.o=.lst): part-of-module := y
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$(real-objs-m)        : quiet_modtag := [M]
$(real-objs-m:.o=.i)  : quiet_modtag := [M]
$(real-objs-m:.o=.s)  : quiet_modtag := [M]
$(real-objs-m:.o=.lst): quiet_modtag := [M]

$(obj-m)              : quiet_modtag := [M]

# Default for not multi-part modules
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modname = $(basetarget)
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$(multi-objs-m)         : modname = $(modname-multi)
$(multi-objs-m:.o=.i)   : modname = $(modname-multi)
$(multi-objs-m:.o=.s)   : modname = $(modname-multi)
$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
$(multi-objs-y)         : modname = $(modname-multi)
$(multi-objs-y:.o=.i)   : modname = $(modname-multi)
$(multi-objs-y:.o=.s)   : modname = $(modname-multi)
$(multi-objs-y:.o=.lst) : modname = $(modname-multi)

quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
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cmd_cc_s_c       = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
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$(obj)/%.s: $(src)/%.c FORCE
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	$(call if_changed_dep,cc_s_c)

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quiet_cmd_cpp_i_c = CPP $(quiet_modtag) $@
cmd_cpp_i_c       = $(CPP) $(c_flags) -o $@ $<
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$(obj)/%.i: $(src)/%.c FORCE
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	$(call if_changed_dep,cpp_i_c)
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# These mirror gensymtypes_S and co below, keep them in synch.
cmd_gensymtypes_c =                                                         \
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    $(CPP) -D__GENKSYMS__ $(c_flags) $< |                                   \
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    $(GENKSYMS) $(if $(1), -T $(2))                                         \
     $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX))             \
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     $(patsubst y,-R,$(CONFIG_MODULE_REL_CRCS))                             \
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     $(if $(KBUILD_PRESERVE),-p)                                            \
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     -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
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quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
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cmd_cc_symtypes_c =                                                         \
    set -e;                                                                 \
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    $(call cmd_gensymtypes_c,true,$@) >/dev/null;                           \
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    test -s $@ || rm -f $@
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$(obj)/%.symtypes : $(src)/%.c FORCE
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	$(call cmd,cc_symtypes_c)
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# LLVM assembly
# Generate .ll files from .c
quiet_cmd_cc_ll_c = CC $(quiet_modtag)  $@
      cmd_cc_ll_c = $(CC) $(c_flags) -emit-llvm -S -o $@ $<

$(obj)/%.ll: $(src)/%.c FORCE
	$(call if_changed_dep,cc_ll_c)

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# C (.c) files
# The C file is compiled and updated dependency information is generated.
# (See cmd_cc_o_c + relevant part of rule_cc_o_c)

quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@

ifndef CONFIG_MODVERSIONS
cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<

else
# When module versioning is enabled the following steps are executed:
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# o compile a .tmp_<file>.o from <file>.c
# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
#   not export symbols, we just rename .tmp_<file>.o to <file>.o and
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#   are done.
# o otherwise, we calculate symbol versions using the good old
#   genksyms on the preprocessed source and postprocess them in a way
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#   that they are usable as a linker script
# o generate <file>.o from .tmp_<file>.o using the linker to
#   replace the unresolved symbols __crc_exported_symbol with
#   the actual value of the checksum generated by genksyms
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cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
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cmd_modversions_c =								\
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	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then		\
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		$(call cmd_gensymtypes_c,$(KBUILD_SYMTYPES),$(@:.o=.symtypes))	\
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		    > $(@D)/.tmp_$(@F:.o=.ver);					\
										\
		$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) 			\
			-T $(@D)/.tmp_$(@F:.o=.ver);				\
		rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);		\
	else									\
		mv -f $(@D)/.tmp_$(@F) $@;					\
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	fi;
endif

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ifdef CONFIG_FTRACE_MCOUNT_RECORD
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ifdef BUILD_C_RECORDMCOUNT
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ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
  RECORDMCOUNT_FLAGS = -w
endif
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# Due to recursion, we must skip empty.o.
# The empty.o file is created in the make process in order to determine
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# the target endianness and word size. It is made before all other C
# files, including recordmcount.
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sub_cmd_record_mcount =					\
	if [ $(@) != "scripts/mod/empty.o" ]; then	\
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		$(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)";	\
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	fi;
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recordmcount_source := $(srctree)/scripts/recordmcount.c \
		    $(srctree)/scripts/recordmcount.h
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else
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sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
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	"$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
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	"$(if $(CONFIG_64BIT),64,32)" \
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	"$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
	"$(LD)" "$(NM)" "$(RM)" "$(MV)" \
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	"$(if $(part-of-module),1,0)" "$(@)";
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recordmcount_source := $(srctree)/scripts/recordmcount.pl
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endif # BUILD_C_RECORDMCOUNT
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cmd_record_mcount =						\
	if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" =	\
	     "$(CC_FLAGS_FTRACE)" ]; then			\
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		$(sub_cmd_record_mcount)			\
	fi;
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endif # CONFIG_FTRACE_MCOUNT_RECORD
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ifdef CONFIG_STACK_VALIDATION
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ifneq ($(SKIP_STACK_VALIDATION),1)
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__objtool_obj := $(objtree)/tools/objtool/objtool

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objtool_args = $(if $(CONFIG_UNWINDER_ORC),orc generate,check)
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ifndef CONFIG_FRAME_POINTER
objtool_args += --no-fp
endif
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ifdef CONFIG_GCOV_KERNEL
objtool_args += --no-unreachable
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else
objtool_args += $(call cc-ifversion, -lt, 0405, --no-unreachable)
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endif
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# 'OBJECT_FILES_NON_STANDARD := y': skip objtool checking for a directory
# 'OBJECT_FILES_NON_STANDARD_foo.o := 'y': skip objtool checking for a file
# 'OBJECT_FILES_NON_STANDARD_foo.o := 'n': override directory skip for a file
cmd_objtool = $(if $(patsubst y%,, \
	$(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
	$(__objtool_obj) $(objtool_args) "$(@)";)
objtool_obj = $(if $(patsubst y%,, \
	$(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
	$(__objtool_obj))

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endif # SKIP_STACK_VALIDATION
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endif # CONFIG_STACK_VALIDATION

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# Rebuild all objects when objtool changes, or is enabled/disabled.
objtool_dep = $(objtool_obj)					\
	      $(wildcard include/config/orc/unwinder.h		\
			 include/config/stack/validation.h)

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define rule_cc_o_c
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	$(call echo-cmd,checksrc) $(cmd_checksrc)			  \
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	$(call cmd_and_fixdep,cc_o_c)					  \
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	$(cmd_modversions_c)						  \
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	$(cmd_checkdoc)							  \
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	$(call echo-cmd,objtool) $(cmd_objtool)				  \
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	$(call echo-cmd,record_mcount) $(cmd_record_mcount)
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endef

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define rule_as_o_S
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	$(call cmd_and_fixdep,as_o_S)					  \
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	$(cmd_modversions_S)						  \
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	$(call echo-cmd,objtool) $(cmd_objtool)
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endef

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# List module undefined symbols (or empty line if not enabled)
ifdef CONFIG_TRIM_UNUSED_KSYMS
cmd_undef_syms = $(NM) $@ | sed -n 's/^ \+U //p' | xargs echo
else
cmd_undef_syms = echo
endif

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# Built-in and composite module parts
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$(obj)/%.o: $(src)/%.c $(recordmcount_source) $(objtool_dep) FORCE
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	$(call cmd,force_checksrc)
	$(call if_changed_rule,cc_o_c)

# Single-part modules are special since we need to mark them in $(MODVERDIR)

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$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) $(objtool_dep) FORCE
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	$(call cmd,force_checksrc)
	$(call if_changed_rule,cc_o_c)
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	@{ echo $(@:.o=.ko); echo $@; \
	   $(cmd_undef_syms); } > $(MODVERDIR)/$(@F:.o=.mod)
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quiet_cmd_cc_lst_c = MKLST   $@
      cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
		     $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
				     System.map $(OBJDUMP) > $@

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$(obj)/%.lst: $(src)/%.c FORCE
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	$(call if_changed_dep,cc_lst_c)

# Compile assembler sources (.S)
# ---------------------------------------------------------------------------

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modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
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$(real-objs-m)      : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
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# .S file exports must have their C prototypes defined in asm/asm-prototypes.h
# or a file that it includes, in order to get versioned symbols. We build a
# dummy C file that includes asm-prototypes and the EXPORT_SYMBOL lines from
# the .S file (with trailing ';'), and run genksyms on that, to extract vers.
#
# This is convoluted. The .S file must first be preprocessed to run guards and
# expand names, then the resulting exports must be constructed into plain
# EXPORT_SYMBOL(symbol); to build our dummy C file, and that gets preprocessed
# to make the genksyms input.
#
# These mirror gensymtypes_c and co above, keep them in synch.
cmd_gensymtypes_S =                                                         \
    (echo "\#include <linux/kernel.h>" ;                                    \
     echo "\#include <asm/asm-prototypes.h>" ;                              \
    $(CPP) $(a_flags) $< |                                                  \
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     grep "\<___EXPORT_SYMBOL\>" |                                          \
     sed 's/.*___EXPORT_SYMBOL[[:space:]]*\([a-zA-Z0-9_]*\)[[:space:]]*,.*/EXPORT_SYMBOL(\1);/' ) | \
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    $(CPP) -D__GENKSYMS__ $(c_flags) -xc - |                                \
    $(GENKSYMS) $(if $(1), -T $(2))                                         \
     $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX))             \
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     $(patsubst y,-R,$(CONFIG_MODULE_REL_CRCS))                             \
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     $(if $(KBUILD_PRESERVE),-p)                                            \
     -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))

quiet_cmd_cc_symtypes_S = SYM $(quiet_modtag) $@
cmd_cc_symtypes_S =                                                         \
    set -e;                                                                 \
    $(call cmd_gensymtypes_S,true,$@) >/dev/null;                           \
    test -s $@ || rm -f $@

$(obj)/%.symtypes : $(src)/%.S FORCE
	$(call cmd,cc_symtypes_S)


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quiet_cmd_cpp_s_S = CPP $(quiet_modtag) $@
cmd_cpp_s_S       = $(CPP) $(a_flags) -o $@ $<
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$(obj)/%.s: $(src)/%.S FORCE
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	$(call if_changed_dep,cpp_s_S)
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quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
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ifndef CONFIG_MODVERSIONS
cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<

else

ASM_PROTOTYPES := $(wildcard $(srctree)/arch/$(SRCARCH)/include/asm/asm-prototypes.h)

ifeq ($(ASM_PROTOTYPES),)
cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<

else

# versioning matches the C process described above, with difference that
# we parse asm-prototypes.h C header to get function definitions.

cmd_as_o_S = $(CC) $(a_flags) -c -o $(@D)/.tmp_$(@F) $<

cmd_modversions_S =								\
	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then		\
		$(call cmd_gensymtypes_S,$(KBUILD_SYMTYPES),$(@:.o=.symtypes))	\
		    > $(@D)/.tmp_$(@F:.o=.ver);					\
										\
		$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) 			\
			-T $(@D)/.tmp_$(@F:.o=.ver);				\
		rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);		\
	else									\
		mv -f $(@D)/.tmp_$(@F) $@;					\
	fi;
endif
endif
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$(obj)/%.o: $(src)/%.S $(objtool_dep) FORCE
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	$(call if_changed_rule,as_o_S)
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targets += $(real-objs-y) $(real-objs-m) $(lib-y)
targets += $(extra-y) $(MAKECMDGOALS) $(always)

# Linker scripts preprocessor (.lds.S -> .lds)
# ---------------------------------------------------------------------------
quiet_cmd_cpp_lds_S = LDS     $@
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      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -U$(ARCH) \
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	                     -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
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$(obj)/%.lds: $(src)/%.lds.S FORCE
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	$(call if_changed_dep,cpp_lds_S)

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# ASN.1 grammar
# ---------------------------------------------------------------------------
quiet_cmd_asn1_compiler = ASN.1   $@
      cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
				$(subst .h,.c,$@) $(subst .c,.h,$@)

.PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h

$(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
	$(call cmd,asn1_compiler)

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# Build the compiled-in targets
# ---------------------------------------------------------------------------

# To build objects in subdirs, we need to descend into the directories
$(sort $(subdir-obj-y)): $(subdir-ym) ;

#
# Rule to compile a set of .o files into one .o file
#
ifdef builtin-target
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ifdef CONFIG_THIN_ARCHIVES
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  cmd_make_builtin = rm -f $@; $(AR) rcSTP$(KBUILD_ARFLAGS)
  cmd_make_empty_builtin = rm -f $@; $(AR) rcSTP$(KBUILD_ARFLAGS)
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  quiet_cmd_link_o_target = AR      $@
else
  cmd_make_builtin = $(LD) $(ld_flags) -r -o
  cmd_make_empty_builtin = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS)
  quiet_cmd_link_o_target = LD      $@
endif

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# If the list of objects to link is empty, just create an empty built-in.o
cmd_link_o_target = $(if $(strip $(obj-y)),\
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		      $(cmd_make_builtin) $@ $(filter $(obj-y), $^) \
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		      $(cmd_secanalysis),\
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		      $(cmd_make_empty_builtin) $@)
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$(builtin-target): $(obj-y) FORCE
	$(call if_changed,link_o_target)

targets += $(builtin-target)
endif # builtin-target

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#
# Rule to create modules.order file
#
# Create commands to either record .ko file or cat modules.order from
# a subdirectory
modorder-cmds =						\
	$(foreach m, $(modorder),			\
		$(if $(filter %/modules.order, $m),	\
			cat $m;, echo kernel/$m;))

$(modorder-target): $(subdir-ym) FORCE
	$(Q)(cat /dev/null; $(modorder-cmds)) > $@

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#
# Rule to compile a set of .o files into one .a file
#
ifdef lib-target
quiet_cmd_link_l_target = AR      $@
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ifdef CONFIG_THIN_ARCHIVES
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  cmd_link_l_target = rm -f $@; $(AR) rcsTP$(KBUILD_ARFLAGS) $@ $(lib-y)
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else
  cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
endif
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$(lib-target): $(lib-y) FORCE
	$(call if_changed,link_l_target)

targets += $(lib-target)
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dummy-object = $(obj)/.lib_exports.o
ksyms-lds = $(dot-target).lds
ifdef CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX
ref_prefix = EXTERN(_
else
ref_prefix = EXTERN(
endif

quiet_cmd_export_list = EXPORTS $@
cmd_export_list = $(OBJDUMP) -h $< | \
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	sed -ne '/___ksymtab/s/.*+\([^ ]*\).*/$(ref_prefix)\1)/p' >$(ksyms-lds);\
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	rm -f $(dummy-object);\
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	echo | $(CC) $(a_flags) -c -o $(dummy-object) -x assembler -;\
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	$(LD) $(ld_flags) -r -o $@ -T $(ksyms-lds) $(dummy-object);\
	rm $(dummy-object) $(ksyms-lds)

$(obj)/lib-ksyms.o: $(lib-target) FORCE
	$(call if_changed,export_list)
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targets += $(obj)/lib-ksyms.o

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endif

#
# Rule to link composite objects
#
#  Composite objects are specified in kbuild makefile as follows:
#    <composite-object>-objs := <list of .o files>
#  or
#    <composite-object>-y    := <list of .o files>
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#  or
#    <composite-object>-m    := <list of .o files>
#  The -m syntax only works if <composite object> is a module
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link_multi_deps =                     \
$(filter $(addprefix $(obj)/,         \
$($(subst $(obj)/,,$(@:.o=-objs)))    \
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$($(subst $(obj)/,,$(@:.o=-y)))       \
$($(subst $(obj)/,,$(@:.o=-m)))), $^)
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cmd_link_multi-link = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)

ifdef CONFIG_THIN_ARCHIVES
  quiet_cmd_link_multi-y = AR      $@
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  cmd_link_multi-y = rm -f $@; $(AR) rcSTP$(KBUILD_ARFLAGS) $@ $(link_multi_deps)
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else
  quiet_cmd_link_multi-y = LD      $@
  cmd_link_multi-y = $(cmd_link_multi-link)
endif
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quiet_cmd_link_multi-m = LD [M]  $@
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cmd_link_multi-m = $(cmd_link_multi-link)
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$(multi-used-y): FORCE
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	$(call if_changed,link_multi-y)
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$(call multi_depend, $(multi-used-y), .o, -objs -y)
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$(multi-used-m): FORCE
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	$(call if_changed,link_multi-m)
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	@{ echo $(@:.o=.ko); echo $(link_multi_deps); \
	   $(cmd_undef_syms); } > $(MODVERDIR)/$(@F:.o=.mod)
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$(call multi_depend, $(multi-used-m), .o, -objs -y -m)
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targets += $(multi-used-y) $(multi-used-m)
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targets := $(filter-out $(PHONY), $(targets))
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# Descending
# ---------------------------------------------------------------------------

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PHONY += $(subdir-ym)
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$(subdir-ym):
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	$(Q)$(MAKE) $(build)=$@ need-builtin=$(if $(findstring $@,$(subdir-obj-y)),1)
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# Add FORCE to the prequisites of a target to force it to be always rebuilt.
# ---------------------------------------------------------------------------

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PHONY += FORCE
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FORCE:

# Read all saved command lines and dependencies for the $(targets) we
# may be building above, using $(if_changed{,_dep}). As an
# optimization, we don't need to read them if the target does not
# exist, we will rebuild anyway in that case.

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cmd_files := $(wildcard $(foreach f,$(sort $(targets)),$(dir $(f)).$(notdir $(f)).cmd))
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ifneq ($(cmd_files),)
  include $(cmd_files)
endif
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ifneq ($(KBUILD_SRC),)
# Create directories for object files if they do not exist
obj-dirs := $(sort $(obj) $(patsubst %/,%, $(dir $(targets))))
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# If cmd_files exist, their directories apparently exist.  Skip mkdir.
exist-dirs := $(sort $(patsubst %/,%, $(dir $(cmd_files))))
obj-dirs := $(strip $(filter-out $(exist-dirs), $(obj-dirs)))
ifneq ($(obj-dirs),)
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$(shell mkdir -p $(obj-dirs))
endif
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endif
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# Declare the contents of the .PHONY variable as phony.  We keep that
# information in a variable se we can use it in if_changed and friends.

.PHONY: $(PHONY)