Commit d7efc352 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'rproc-v4.14' of git://github.com/andersson/remoteproc

Pull remoteproc updates from Bjorn Andersson:
 "This adds and improves remoteproc support for TI DA8xx/OMAP-L13x DSP,
  TI Keystone 66AK2G DSP and iMX6SX/7D Cortex M4 coprocessors. It
  introduces the Qualcomm restart notifier and a few fixes"

* tag 'rproc-v4.14' of git://github.com/andersson/remoteproc:
  remoteproc: Introduce rproc handle accessor for children
  remoteproc: qcom: Make ssr_notifiers local
  remoteproc: Stop subdevices in reverse order
  remoteproc: imx_rproc: add a NXP/Freescale imx_rproc driver
  remoteproc: dt: Provide bindings for iMX6SX/7D Remote Processor Controller driver
  remoteproc: qcom: Use PTR_ERR_OR_ZERO
  remoteproc: st: explicitly request exclusive reset control
  remoteproc: qcom: explicitly request exclusive reset control
  remoteproc/keystone: explicitly request exclusive reset control
  remoteproc/keystone: Add support for Keystone 66AK2G SOCs
  remoteproc/davinci: Add device tree support for OMAP-L138 DSP
  dt-bindings: remoteproc: Add bindings for Davinci DSP processors
  remoteproc/davinci: Add support to parse internal memories
  remoteproc/davinci: Switch to platform_get_resource_byname()
  remoteproc: make device_type const
  soc: qcom: GLINK SSR notifier
  remoteproc: qcom: Add support for SSR notifications
  remoteproc: Merge __rproc_boot() with rproc_boot()
parents 8c1d70b2 7c89717f
NXP iMX6SX/iMX7D Co-Processor Bindings
----------------------------------------
This binding provides support for ARM Cortex M4 Co-processor found on some
NXP iMX SoCs.
Required properties:
- compatible Should be one of:
"fsl,imx7d-cm4"
"fsl,imx6sx-cm4"
- clocks Clock for co-processor (See: ../clock/clock-bindings.txt)
- syscon Phandle to syscon block which provide access to
System Reset Controller
Optional properties:
- memory-region list of phandels to the reserved memory regions.
(See: ../reserved-memory/reserved-memory.txt)
Example:
m4_reserved_sysmem1: cm4@80000000 {
reg = <0x80000000 0x80000>;
};
m4_reserved_sysmem2: cm4@81000000 {
reg = <0x81000000 0x80000>;
};
imx7d-cm4 {
compatible = "fsl,imx7d-cm4";
memory-region = <&m4_reserved_sysmem1>, <&m4_reserved_sysmem2>;
syscon = <&src>;
clocks = <&clks IMX7D_ARM_M4_ROOT_CLK>;
};
TI Davinci DSP devices
=======================
Binding status: Unstable - Subject to changes for DT representation of clocks
and resets
The TI Davinci family of SoCs usually contains a TI DSP Core sub-system that
is used to offload some of the processor-intensive tasks or algorithms, for
achieving various system level goals.
The processor cores in the sub-system usually contain additional sub-modules
like L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory
controller, a dedicated local power/sleep controller etc. The DSP processor
core used in Davinci SoCs is usually a C674x DSP CPU.
DSP Device Node:
================
Each DSP Core sub-system is represented as a single DT node.
Required properties:
--------------------
The following are the mandatory properties:
- compatible: Should be one of the following,
"ti,da850-dsp" for DSPs on OMAP-L138 SoCs
- reg: Should contain an entry for each value in 'reg-names'.
Each entry should have the memory region's start address
and the size of the region, the representation matching
the parent node's '#address-cells' and '#size-cells' values.
- reg-names: Should contain strings with the following names, each
representing a specific internal memory region or a
specific register space,
"l2sram", "l1pram", "l1dram", "host1cfg", "chipsig_base"
- interrupts: Should contain the interrupt number used to receive the
interrupts from the DSP. The value should follow the
interrupt-specifier format as dictated by the
'interrupt-parent' node.
- memory-region: phandle to the reserved memory node to be associated
with the remoteproc device. The reserved memory node
can be a CMA memory node, and should be defined as
per the bindings in
Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
Optional properties:
--------------------
- interrupt-parent: phandle to the interrupt controller node. This property
is needed if the device node hierarchy doesn't have an
interrupt controller.
Example:
--------
/* DSP Reserved Memory node */
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
dsp_memory_region: dsp-memory@c3000000 {
compatible = "shared-dma-pool";
reg = <0xc3000000 0x1000000>;
reusable;
};
};
/* DSP node */
{
dsp: dsp@11800000 {
compatible = "ti,da850-dsp";
reg = <0x11800000 0x40000>,
<0x11e00000 0x8000>,
<0x11f00000 0x8000>,
<0x01c14044 0x4>,
<0x01c14174 0x8>;
reg-names = "l2sram", "l1pram", "l1dram", "host1cfg",
"chipsig";
interrupt-parent = <&intc>;
interrupts = <28>;
memory-region = <&dsp_memory_region>;
};
};
......@@ -26,6 +26,7 @@ The following are the mandatory properties:
"ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs
"ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs
"ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs
"ti,k2g-dsp" for DSPs on Keystone 2 66AK2G SoCs
- reg: Should contain an entry for each value in 'reg-names'.
Each entry should have the memory region's start address
......@@ -37,20 +38,18 @@ The following are the mandatory properties:
should be defined in this order,
"l2sram", "l1pram", "l1dram"
- clocks: Should contain the device's input clock, and should be
defined as per the bindings in,
Documentation/devicetree/bindings/clock/keystone-gate.txt
- ti,syscon-dev: Should be a pair of the phandle to the Keystone Device
State Control node, and the register offset of the DSP
boot address register within that node's address space.
- resets: Should contain the phandle to the reset controller node
managing the resets for this device, and a reset
specifier. Please refer to the following reset bindings
for the reset argument specifier as per SoC,
specifier. Please refer to either of the following reset
bindings for the reset argument specifier as per SoC,
Documentation/devicetree/bindings/reset/ti-syscon-reset.txt
for 66AK2HK/66AK2L/66AK2E SoCs
for 66AK2HK/66AK2L/66AK2E SoCs or,
Documentation/devicetree/bindings/reset/ti,sci-reset.txt
for 66AK2G SoCs
- interrupt-parent: Should contain a phandle to the Keystone 2 IRQ controller
IP node that is used by the ARM CorePac processor to
......@@ -75,6 +74,22 @@ The following are the mandatory properties:
The gpio device to be used is as per the bindings in,
Documentation/devicetree/bindings/gpio/gpio-dsp-keystone.txt
SoC-specific Required properties:
---------------------------------
The following are mandatory properties for Keystone 2 66AK2HK, 66AK2L and 66AK2E
SoCs only:
- clocks: Should contain the device's input clock, and should be
defined as per the bindings in,
Documentation/devicetree/bindings/clock/keystone-gate.txt
The following are mandatory properties for Keystone 2 66AK2G SoCs only:
- power-domains: Should contain a phandle to a PM domain provider node
and an args specifier containing the DSP device id
value. This property is as per the binding,
Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
Optional properties:
--------------------
......@@ -85,8 +100,10 @@ Optional properties:
Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
Example:
--------
Examples:
---------
1.
/* 66AK2H/K DSP aliases */
aliases {
rproc0 = &dsp0;
......@@ -131,3 +148,41 @@ Example:
};
};
2.
/* 66AK2G DSP alias */
aliases {
rproc0 = &dsp0;
};
/* 66AK2G DSP memory node */
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
dsp_common_memory: dsp-common-memory@81f800000 {
compatible = "shared-dma-pool";
reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
reusable;
};
};
/* 66AK2G DSP node */
soc {
dsp0: dsp@10800000 {
compatible = "ti,k2g-dsp";
reg = <0x10800000 0x00100000>,
<0x10e00000 0x00008000>,
<0x10f00000 0x00008000>;
reg-names = "l2sram", "l1pram", "l1dram";
power-domains = <&k2g_pds 0x0046>;
ti,syscon-dev = <&devctrl 0x40>;
resets = <&k2g_reset 0x0046 0x1>;
interrupt-parent = <&kirq0>;
interrupts = <0 8>;
interrupt-names = "vring", "exception";
kick-gpios = <&dspgpio0 27 0>;
memory-region = <&dsp_common_memory>;
};
};
......@@ -12,6 +12,15 @@ config REMOTEPROC
if REMOTEPROC
config IMX_REMOTEPROC
tristate "IMX6/7 remoteproc support"
depends on SOC_IMX6SX || SOC_IMX7D
help
Say y here to support iMX's remote processors (Cortex M4
on iMX7D) via the remote processor framework.
It's safe to say N here.
config OMAP_REMOTEPROC
tristate "OMAP remoteproc support"
depends on HAS_DMA
......
......@@ -8,6 +8,7 @@ remoteproc-y += remoteproc_debugfs.o
remoteproc-y += remoteproc_sysfs.o
remoteproc-y += remoteproc_virtio.o
remoteproc-y += remoteproc_elf_loader.o
obj-$(CONFIG_IMX_REMOTEPROC) += imx_rproc.o
obj-$(CONFIG_OMAP_REMOTEPROC) += omap_remoteproc.o
obj-$(CONFIG_WKUP_M3_RPROC) += wkup_m3_rproc.o
obj-$(CONFIG_DA8XX_REMOTEPROC) += da8xx_remoteproc.o
......
......@@ -16,6 +16,7 @@
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of_reserved_mem.h>
#include <linux/platform_device.h>
#include <linux/remoteproc.h>
......@@ -38,9 +39,27 @@ MODULE_PARM_DESC(da8xx_fw_name,
#define SYSCFG_CHIPSIG3 BIT(3)
#define SYSCFG_CHIPSIG4 BIT(4)
#define DA8XX_RPROC_LOCAL_ADDRESS_MASK (SZ_16M - 1)
/**
* struct da8xx_rproc_mem - internal memory structure
* @cpu_addr: MPU virtual address of the memory region
* @bus_addr: Bus address used to access the memory region
* @dev_addr: Device address of the memory region from DSP view
* @size: Size of the memory region
*/
struct da8xx_rproc_mem {
void __iomem *cpu_addr;
phys_addr_t bus_addr;
u32 dev_addr;
size_t size;
};
/**
* struct da8xx_rproc - da8xx remote processor instance state
* @rproc: rproc handle
* @mem: internal memory regions data
* @num_mems: number of internal memory regions
* @dsp_clk: placeholder for platform's DSP clk
* @ack_fxn: chip-specific ack function for ack'ing irq
* @irq_data: ack_fxn function parameter
......@@ -50,6 +69,8 @@ MODULE_PARM_DESC(da8xx_fw_name,
*/
struct da8xx_rproc {
struct rproc *rproc;
struct da8xx_rproc_mem *mem;
int num_mems;
struct clk *dsp_clk;
void (*ack_fxn)(struct irq_data *data);
struct irq_data *irq_data;
......@@ -158,6 +179,44 @@ static const struct rproc_ops da8xx_rproc_ops = {
.kick = da8xx_rproc_kick,
};
static int da8xx_rproc_get_internal_memories(struct platform_device *pdev,
struct da8xx_rproc *drproc)
{
static const char * const mem_names[] = {"l2sram", "l1pram", "l1dram"};
int num_mems = ARRAY_SIZE(mem_names);
struct device *dev = &pdev->dev;
struct resource *res;
int i;
drproc->mem = devm_kcalloc(dev, num_mems, sizeof(*drproc->mem),
GFP_KERNEL);
if (!drproc->mem)
return -ENOMEM;
for (i = 0; i < num_mems; i++) {
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
mem_names[i]);
drproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res);
if (IS_ERR(drproc->mem[i].cpu_addr)) {
dev_err(dev, "failed to parse and map %s memory\n",
mem_names[i]);
return PTR_ERR(drproc->mem[i].cpu_addr);
}
drproc->mem[i].bus_addr = res->start;
drproc->mem[i].dev_addr =
res->start & DA8XX_RPROC_LOCAL_ADDRESS_MASK;
drproc->mem[i].size = resource_size(res);
dev_dbg(dev, "memory %8s: bus addr %pa size 0x%x va %p da 0x%x\n",
mem_names[i], &drproc->mem[i].bus_addr,
drproc->mem[i].size, drproc->mem[i].cpu_addr,
drproc->mem[i].dev_addr);
}
drproc->num_mems = num_mems;
return 0;
}
static int da8xx_rproc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
......@@ -184,12 +243,14 @@ static int da8xx_rproc_probe(struct platform_device *pdev)
return -EINVAL;
}
bootreg_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
bootreg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"host1cfg");
bootreg = devm_ioremap_resource(dev, bootreg_res);
if (IS_ERR(bootreg))
return PTR_ERR(bootreg);
chipsig_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
chipsig_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"chipsig");
chipsig = devm_ioremap_resource(dev, chipsig_res);
if (IS_ERR(chipsig))
return PTR_ERR(chipsig);
......@@ -201,16 +262,31 @@ static int da8xx_rproc_probe(struct platform_device *pdev)
return PTR_ERR(dsp_clk);
}
if (dev->of_node) {
ret = of_reserved_mem_device_init(dev);
if (ret) {
dev_err(dev, "device does not have specific CMA pool: %d\n",
ret);
return ret;
}
}
rproc = rproc_alloc(dev, "dsp", &da8xx_rproc_ops, da8xx_fw_name,
sizeof(*drproc));
if (!rproc)
return -ENOMEM;
if (!rproc) {
ret = -ENOMEM;
goto free_mem;
}
drproc = rproc->priv;
drproc->rproc = rproc;
drproc->dsp_clk = dsp_clk;
rproc->has_iommu = false;
ret = da8xx_rproc_get_internal_memories(pdev, drproc);
if (ret)
goto free_rproc;
platform_set_drvdata(pdev, rproc);
/* everything the ISR needs is now setup, so hook it up */
......@@ -247,7 +323,9 @@ static int da8xx_rproc_probe(struct platform_device *pdev)
free_rproc:
rproc_free(rproc);
free_mem:
if (dev->of_node)
of_reserved_mem_device_release(dev);
return ret;
}
......@@ -255,6 +333,7 @@ static int da8xx_rproc_remove(struct platform_device *pdev)
{
struct rproc *rproc = platform_get_drvdata(pdev);
struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
struct device *dev = &pdev->dev;
/*
* The devm subsystem might end up releasing things before
......@@ -265,15 +344,24 @@ static int da8xx_rproc_remove(struct platform_device *pdev)
rproc_del(rproc);
rproc_free(rproc);
if (dev->of_node)
of_reserved_mem_device_release(dev);
return 0;
}
static const struct of_device_id davinci_rproc_of_match[] __maybe_unused = {
{ .compatible = "ti,da850-dsp", },
{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(of, davinci_rproc_of_match);
static struct platform_driver da8xx_rproc_driver = {
.probe = da8xx_rproc_probe,
.remove = da8xx_rproc_remove,
.driver = {
.name = "davinci-rproc",
.of_match_table = of_match_ptr(davinci_rproc_of_match),
},
};
......
/*
* Copyright (c) 2017 Pengutronix, Oleksij Rempel <kernel@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*/
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/remoteproc.h>
#define IMX7D_SRC_SCR 0x0C
#define IMX7D_ENABLE_M4 BIT(3)
#define IMX7D_SW_M4P_RST BIT(2)
#define IMX7D_SW_M4C_RST BIT(1)
#define IMX7D_SW_M4C_NON_SCLR_RST BIT(0)
#define IMX7D_M4_RST_MASK (IMX7D_ENABLE_M4 | IMX7D_SW_M4P_RST \
| IMX7D_SW_M4C_RST \
| IMX7D_SW_M4C_NON_SCLR_RST)
#define IMX7D_M4_START (IMX7D_ENABLE_M4 | IMX7D_SW_M4P_RST \
| IMX7D_SW_M4C_RST)
#define IMX7D_M4_STOP IMX7D_SW_M4C_NON_SCLR_RST
/* Address: 0x020D8000 */
#define IMX6SX_SRC_SCR 0x00
#define IMX6SX_ENABLE_M4 BIT(22)
#define IMX6SX_SW_M4P_RST BIT(12)
#define IMX6SX_SW_M4C_NON_SCLR_RST BIT(4)
#define IMX6SX_SW_M4C_RST BIT(3)
#define IMX6SX_M4_START (IMX6SX_ENABLE_M4 | IMX6SX_SW_M4P_RST \
| IMX6SX_SW_M4C_RST)
#define IMX6SX_M4_STOP IMX6SX_SW_M4C_NON_SCLR_RST
#define IMX6SX_M4_RST_MASK (IMX6SX_ENABLE_M4 | IMX6SX_SW_M4P_RST \
| IMX6SX_SW_M4C_NON_SCLR_RST \
| IMX6SX_SW_M4C_RST)
#define IMX7D_RPROC_MEM_MAX 8
/**
* struct imx_rproc_mem - slim internal memory structure
* @cpu_addr: MPU virtual address of the memory region
* @sys_addr: Bus address used to access the memory region
* @size: Size of the memory region
*/
struct imx_rproc_mem {
void __iomem *cpu_addr;
phys_addr_t sys_addr;
size_t size;
};
/* att flags */
/* M4 own area. Can be mapped at probe */
#define ATT_OWN BIT(1)
/* address translation table */
struct imx_rproc_att {
u32 da; /* device address (From Cortex M4 view)*/
u32 sa; /* system bus address */
u32 size; /* size of reg range */
int flags;
};
struct imx_rproc_dcfg {
u32 src_reg;
u32 src_mask;
u32 src_start;
u32 src_stop;
const struct imx_rproc_att *att;
size_t att_size;
};
struct imx_rproc {
struct device *dev;
struct regmap *regmap;
struct rproc *rproc;
const struct imx_rproc_dcfg *dcfg;
struct imx_rproc_mem mem[IMX7D_RPROC_MEM_MAX];
struct clk *clk;
};
static const struct imx_rproc_att imx_rproc_att_imx7d[] = {
/* dev addr , sys addr , size , flags */
/* OCRAM_S (M4 Boot code) - alias */
{ 0x00000000, 0x00180000, 0x00008000, 0 },
/* OCRAM_S (Code) */
{ 0x00180000, 0x00180000, 0x00008000, ATT_OWN },
/* OCRAM (Code) - alias */
{ 0x00900000, 0x00900000, 0x00020000, 0 },
/* OCRAM_EPDC (Code) - alias */
{ 0x00920000, 0x00920000, 0x00020000, 0 },
/* OCRAM_PXP (Code) - alias */
{ 0x00940000, 0x00940000, 0x00008000, 0 },
/* TCML (Code) */
{ 0x1FFF8000, 0x007F8000, 0x00008000, ATT_OWN },
/* DDR (Code) - alias, first part of DDR (Data) */
{ 0x10000000, 0x80000000, 0x0FFF0000, 0 },
/* TCMU (Data) */
{ 0x20000000, 0x00800000, 0x00008000, ATT_OWN },
/* OCRAM (Data) */
{ 0x20200000, 0x00900000, 0x00020000, 0 },
/* OCRAM_EPDC (Data) */
{ 0x20220000, 0x00920000, 0x00020000, 0 },
/* OCRAM_PXP (Data) */
{ 0x20240000, 0x00940000, 0x00008000, 0 },
/* DDR (Data) */
{ 0x80000000, 0x80000000, 0x60000000, 0 },
};
static const struct imx_rproc_att imx_rproc_att_imx6sx[] = {
/* dev addr , sys addr , size , flags */
/* TCML (M4 Boot Code) - alias */
{ 0x00000000, 0x007F8000, 0x00008000, 0 },
/* OCRAM_S (Code) */
{ 0x00180000, 0x008F8000, 0x00004000, 0 },
/* OCRAM_S (Code) - alias */
{ 0x00180000, 0x008FC000, 0x00004000, 0 },
/* TCML (Code) */
{ 0x1FFF8000, 0x007F8000, 0x00008000, ATT_OWN },
/* DDR (Code) - alias, first part of DDR (Data) */
{ 0x10000000, 0x80000000, 0x0FFF8000, 0 },
/* TCMU (Data) */
{ 0x20000000, 0x00800000, 0x00008000, ATT_OWN },
/* OCRAM_S (Data) - alias? */
{ 0x208F8000, 0x008F8000, 0x00004000, 0 },
/* DDR (Data) */
{ 0x80000000, 0x80000000, 0x60000000, 0 },
};
static const struct imx_rproc_dcfg imx_rproc_cfg_imx7d = {
.src_reg = IMX7D_SRC_SCR,
.src_mask = IMX7D_M4_RST_MASK,
.src_start = IMX7D_M4_START,
.src_stop = IMX7D_M4_STOP,
.att = imx_rproc_att_imx7d,
.att_size = ARRAY_SIZE(imx_rproc_att_imx7d),
};
static const struct imx_rproc_dcfg imx_rproc_cfg_imx6sx = {
.src_reg = IMX6SX_SRC_SCR,
.src_mask = IMX6SX_M4_RST_MASK,
.src_start = IMX6SX_M4_START,
.src_stop = IMX6SX_M4_STOP,
.att = imx_rproc_att_imx6sx,
.att_size = ARRAY_SIZE(imx_rproc_att_imx6sx),
};
static int imx_rproc_start(struct rproc *rproc)
{
struct imx_rproc *priv = rproc->priv;
const struct imx_rproc_dcfg *dcfg = priv->dcfg;
struct device *dev = priv->dev;
int ret;
ret = regmap_update_bits(priv->regmap, dcfg->src_reg,
dcfg->src_mask, dcfg->src_start);
if (ret)
dev_err(dev, "Filed to enable M4!\n");
return ret;
}
static int imx_rproc_stop(struct rproc *rproc)
{
struct imx_rproc *priv = rproc->priv;
const struct imx_rproc_dcfg *dcfg = priv->dcfg;
struct device *dev = priv->dev;
int ret;
ret = regmap_update_bits(priv->regmap, dcfg->src_reg,
dcfg->src_mask, dcfg->src_stop);
if (ret)
dev_err(dev, "Filed to stop M4!\n");