1. 20 Oct, 2017 3 commits
    • Cyril Bur's avatar
      powerpc/tm: Add commandline option to disable hardware transactional memory · 07fd1761
      Cyril Bur authored
      
      
      Currently the kernel relies on firmware to inform it whether or not the
      CPU supports HTM and as long as the kernel was built with
      CONFIG_PPC_TRANSACTIONAL_MEM=y then it will allow userspace to make
      use of the facility.
      
      There may be situations where it would be advantageous for the kernel
      to not allow userspace to use HTM, currently the only way to achieve
      this is to recompile the kernel with CONFIG_PPC_TRANSACTIONAL_MEM=n.
      
      This patch adds a simple commandline option so that HTM can be
      disabled at boot time.
      Signed-off-by: default avatarCyril Bur <cyrilbur@gmail.com>
      [mpe: Simplify to a bool, move to prom.c, put doco in the right place.
       Always disable, regardless of initial state, to avoid user confusion.]
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      07fd1761
    • Michael Ellerman's avatar
      Merge branch 'topic/ppc-kvm' into next · ddd46ed2
      Michael Ellerman authored
      Bring in some KVM commits we need (the TM one in particular).
      ddd46ed2
    • Michael Ellerman's avatar
      KVM: PPC: Tie KVM_CAP_PPC_HTM to the user-visible TM feature · 2a3d6553
      Michael Ellerman authored
      
      
      Currently we use CPU_FTR_TM to decide if the CPU/kernel can support
      TM (Transactional Memory), and if it's true we advertise that to
      Qemu (or similar) via KVM_CAP_PPC_HTM.
      
      PPC_FEATURE2_HTM is the user-visible feature bit, which indicates that
      the CPU and kernel can support TM. Currently CPU_FTR_TM and
      PPC_FEATURE2_HTM always have the same value, either true or false, so
      using the former for KVM_CAP_PPC_HTM is correct.
      
      However some Power9 CPUs can operate in a mode where TM is enabled but
      TM suspended state is disabled. In this mode CPU_FTR_TM is true, but
      PPC_FEATURE2_HTM is false. Instead a different PPC_FEATURE2 bit is
      set, to indicate that this different mode of TM is available.
      
      It is not safe to let guests use TM as-is, when the CPU is in this
      mode. So to prevent that from happening, use PPC_FEATURE2_HTM to
      determine the value of KVM_CAP_PPC_HTM.
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      2a3d6553
  2. 19 Oct, 2017 1 commit
  3. 16 Oct, 2017 9 commits
  4. 13 Oct, 2017 3 commits
  5. 10 Oct, 2017 1 commit
  6. 06 Oct, 2017 7 commits
  7. 05 Oct, 2017 2 commits
    • Naveen N. Rao's avatar
      powerpc/jprobes: Validate break handler invocation as being due to a jprobe_return() · 3368f569
      Naveen N. Rao authored
      
      
      Fix a circa 2005 FIXME by implementing a check to ensure that we
      actually got into the jprobe break handler() due to the trap in
      jprobe_return().
      Acked-by: default avatarMasami Hiramatsu <mhiramat@kernel.org>
      Signed-off-by: default avatarNaveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      3368f569
    • Naveen N. Rao's avatar
      powerpc/jprobes: Disable preemption when triggered through ftrace · 6baea433
      Naveen N. Rao authored
      KPROBES_SANITY_TEST throws the below splat when CONFIG_PREEMPT is
      enabled:
      
        Kprobe smoke test: started
        DEBUG_LOCKS_WARN_ON(val > preempt_count())
        ------------[ cut here ]------------
        WARNING: CPU: 19 PID: 1 at kernel/sched/core.c:3094 preempt_count_sub+0xcc/0x140
        Modules linked in:
        CPU: 19 PID: 1 Comm: swapper/0 Not tainted 4.13.0-rc7-nnr+ #97
        task: c0000000fea80000 task.stack: c0000000feb00000
        NIP:  c00000000011d3dc LR: c00000000011d3d8 CTR: c000000000a090d0
        REGS: c0000000feb03400 TRAP: 0700   Not tainted  (4.13.0-rc7-nnr+)
        MSR:  8000000000021033 <SF,ME,IR,DR,RI,LE>  CR: 28000282  XER: 00000000
        CFAR: c00000000015aa18 SOFTE: 0
        <snip>
        NIP preempt_count_sub+0xcc/0x140
        LR  preempt_count_sub+0xc8/0x140
        Call Trace:
          preempt_count_sub+0xc8/0x140 (unreliable)
          kprobe_handler+0x228/0x4b0
          program_check_exception+0x58/0x3b0
          program_check_common+0x16c/0x170
          --- interrupt: 0 at kprobe_target+0x8/0x20
                           LR = init_test_probes+0x248/0x7d0
          kp+0x0/0x80 (unreliable)
          livepatch_handler+0x38/0x74
          init_kprobes+0x1d8/0x208
          do_one_initcall+0x68/0x1d0
          kernel_init_freeable+0x298/0x374
          kernel_init+0x24/0x160
          ret_from_kernel_thread+0x5c/0x70
        Instruction dump:
        419effdc 3d22001b 39299240 81290000 2f890000 409effc8 3c82ffcb 3c62ffcb
        3884bc68 3863bc18 4803d5fd 60000000 <0fe00000> 4bffffa8 60000000 60000000
        ---[ end trace 432dd46b4ce3d29f ]---
        Kprobe smoke test: passed successfully
      
      The issue is that we aren't disabling preemption in
      kprobe_ftrace_handler(). Disable it.
      
      Fixes: ead514d5
      
       ("powerpc/kprobes: Add support for KPROBES_ON_FTRACE")
      Acked-by: default avatarMasami Hiramatsu <mhiramat@kernel.org>
      Signed-off-by: default avatarNaveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
      [mpe: Trim oops a little for formatting]
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      6baea433
  8. 04 Oct, 2017 14 commits
    • Naveen N. Rao's avatar
      powerpc/kprobes: Fix warnings from __this_cpu_read() on preempt kernels · c179ea27
      Naveen N. Rao authored
      Kamalesh pointed out that we are getting the below call traces with
      livepatched functions when we enable CONFIG_PREEMPT:
      
      [  495.470721] BUG: using __this_cpu_read() in preemptible [00000000] code: cat/8394
      [  495.471167] caller is is_current_kprobe_addr+0x30/0x90
      [  495.471171] CPU: 4 PID: 8394 Comm: cat Tainted: G              K 4.13.0-rc7-nnr+ #95
      [  495.471173] Call Trace:
      [  495.471178] [c00000008fd9b960] [c0000000009f039c] dump_stack+0xec/0x160 (unreliable)
      [  495.471184] [c00000008fd9b9a0] [c00000000059169c] check_preemption_disabled+0x15c/0x170
      [  495.471187] [c00000008fd9ba30] [c000000000046460] is_current_kprobe_addr+0x30/0x90
      [  495.471191] [c00000008fd9ba60] [c00000000004e9a0] ftrace_call+0x1c/0xb8
      [  495.471195] [c00000008fd9bc30] [c000000000376fd8] seq_read+0x238/0x5c0
      [  495.471199] [c00000008fd9bcd0] [c0000000003cfd78] proc_reg_read+0x88/0xd0
      [  495.471203] [c00000008fd9bd00] [c00000000033e5d4] __vfs_read+0x44/0x1b0
      [  495.471206] [c00000008fd9bd90] [c0000000003402ec] vfs_read+0xbc/0x1b0
      [  495.471210] [c00000008fd9bde0] [c000000000342138] SyS_read+0x68/0x110
      [  495.471214] [c00000008fd9be30] [c00000000000bc6c] system_call+0x58/0x6c
      
      Commit c05b8c44 ("powerpc/kprobes: Skip livepatch_handler() for
      jprobes") introduced a helper is_current_kprobe_addr() to help determine
      if the current function has been livepatched or if it has a jprobe
      installed, both of which modify the NIP. This was subsequently renamed
      to __is_active_jprobe().
      
      In the case of a jprobe, kprobe_ftrace_handler() disables pre-emption
      before calling into setjmp_pre_handler() which returns without disabling
      pre-emption. This is done to ensure that the jprobe handler won't
      disappear beneath us if the jprobe is unregistered between the
      setjmp_pre_handler() and the subsequent longjmp_break_handler() called
      from the jprobe handler. Due to this, we can use __this_cpu_read() in
      __is_active_jprobe() with the pre-emption check as we know that
      pre-emption will be disabled.
      
      However, if this function has been livepatched, we are still doing this
      check and when we do so, pre-emption won't necessarily be disabled. This
      results in the call trace shown above.
      
      Fix this by only invoking __is_active_jprobe() when pre-emption is
      disabled. And since we now guard this within a pre-emption check, we can
      instead use raw_cpu_read() to get the current_kprobe value skipping the
      check done by __this_cpu_read().
      
      Fixes: c05b8c44
      
       ("powerpc/kprobes: Skip livepatch_handler() for jprobes")
      Reported-by: default avatarKamalesh Babulal <kamalesh@linux.vnet.ibm.com>
      Tested-by: default avatarKamalesh Babulal <kamalesh@linux.vnet.ibm.com>
      Signed-off-by: default avatarNaveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      c179ea27
    • Naveen N. Rao's avatar
      powerpc/kprobes: Clean up jprobe detection in livepatch handler · bf3a9125
      Naveen N. Rao authored
      In commit c05b8c44
      
       ("powerpc/kprobes: Skip livepatch_handler() for
      jprobes"), we added a helper is_current_kprobe_addr() to help detect if
      the modified regs->nip was due to a jprobe or livepatch. Masami felt
      that the function name was not quite clear. To that end, this patch
      renames is_current_kprobe_addr() to __is_active_jprobe() and adds a
      comment to (hopefully) better clarify the purpose of this helper. The
      helper has also now been moved to kprobes-ftrace.c so that it is only
      available for KPROBES_ON_FTRACE.
      Signed-off-by: default avatarNaveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      bf3a9125
    • Naveen N. Rao's avatar
      powerpc/kprobes: Do not suppress instruction emulation if a single run failed · a7b44038
      Naveen N. Rao authored
      
      
      Currently, we disable instruction emulation if emulate_step() fails for
      any reason. However, such failures could be transient and specific to a
      particular run. Instead, only disable instruction emulation if we have
      never been able to emulate this. If we had emulated this instruction
      successfully at least once, then we single step only this probe hit and
      continue to try emulating the instruction in subsequent probe hits.
      Signed-off-by: default avatarNaveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      a7b44038
    • Naveen N. Rao's avatar
      powerpc/kprobes: Some cosmetic updates to try_to_emulate() · 22085337
      Naveen N. Rao authored
      
      
      1. This is only used in kprobes.c, so make it static.
      2. Remove the un-necessary (ret == 0) comparison in the else clause.
      Reviewed-by: default avatarMasami Hiramatsu <mhiramat@kernel.org>
      Reviewed-by: default avatarKamalesh Babulal <kamalesh@linux.vnet.ibm.com>
      Signed-off-by: default avatarNaveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      22085337
    • Joel Stanley's avatar
      powerpc/configs: Add Skiroot defconfig · c3dda4b0
      Joel Stanley authored
      
      
      This configuration is used by the OpenPower firmware for it's
      Linux-as-bootloader implementation. Also known as the Petitboot
      kernel, this configuration broke in 4.12 (CPU_HOTPLUG=n), so add it to
      the upstream tree in order to get better coverage.
      Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      c3dda4b0
    • Sandipan Das's avatar
      powerpc/lib/sstep: Fix fixed-point shift instructions that set CA32 · 0a75aff1
      Sandipan Das authored
      This fixes the emulated behaviour of existing fixed-point shift right
      algebraic instructions that are supposed to set both the CA and CA32
      bits of XER when running on a system that is compliant with POWER ISA
      v3.0 independent of whether the system is executing in 32-bit mode or
      64-bit mode. The following instructions are affected:
        * Shift Right Algebraic Word Immediate (srawi[.])
        * Shift Right Algebraic Word (sraw[.])
        * Shift Right Algebraic Doubleword Immediate (sradi[.])
        * Shift Right Algebraic Doubleword (srad[.])
      
      Fixes: 0016a4cf
      
       ("powerpc: Emulate most Book I instructions in emulate_step()")
      Signed-off-by: default avatarSandipan Das <sandipan@linux.vnet.ibm.com>
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      0a75aff1
    • Sandipan Das's avatar
      powerpc/lib/sstep: Fix fixed-point arithmetic instructions that set CA32 · dc39c1d6
      Sandipan Das authored
      There are existing fixed-point arithmetic instructions that always set the
      CA bit of XER to reflect the carry out of bit 0 in 64-bit mode and out of
      bit 32 in 32-bit mode. In ISA v3.0, these instructions also always set the
      CA32 bit of XER to reflect the carry out of bit 32.
      
      This fixes the emulated behaviour of such instructions when running on a
      system that is compliant with POWER ISA v3.0. The following instructions
      are affected:
        * Add Immediate Carrying (addic)
        * Add Immediate Carrying and Record (addic.)
        * Subtract From Immediate Carrying (subfic)
        * Add Carrying (addc[.])
        * Subtract From Carrying (subfc[.])
        * Add Extended (adde[.])
        * Subtract From Extended (subfe[.])
        * Add to Minus One Extended (addme[.])
        * Subtract From Minus One Extended (subfme[.])
        * Add to Zero Extended (addze[.])
        * Subtract From Zero Extended (subfze[.])
      
      Fixes: 0016a4cf
      
       ("powerpc: Emulate most Book I instructions in emulate_step()")
      Signed-off-by: default avatarSandipan Das <sandipan@linux.vnet.ibm.com>
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      dc39c1d6
    • Sandipan Das's avatar
      powerpc/lib/sstep: Add XER bits introduced in POWER ISA v3.0 · 924c8feb
      Sandipan Das authored
      
      
      This adds definitions for the OV32 and CA32 bits of XER that
      were introduced in POWER ISA v3.0. There are some existing
      instructions that currently set the OV and CA bits based on
      certain conditions.
      
      The emulation behaviour of all these instructions needs to
      be updated to set these new bits accordingly.
      Signed-off-by: default avatarSandipan Das <sandipan@linux.vnet.ibm.com>
      Acked-by: default avatarNaveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      924c8feb
    • Allen Pais's avatar
      powerpc/powermac: Use setup_timer() helper · 01451ad4
      Allen Pais authored
      
      
      Use setup_timer function instead of initializing timer with the
      function and data fields.
      Signed-off-by: default avatarAllen Pais <allen.lkml@gmail.com>
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      01451ad4
    • Allen Pais's avatar
      powerpc/6xx: Use setup_timer() helper · 8d6b1bf2
      Allen Pais authored
      
      
      Use setup_timer function instead of initializing timer with the
      function and data fields.
      Signed-off-by: default avatarAllen Pais <allen.lkml@gmail.com>
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      8d6b1bf2
    • Allen Pais's avatar
      powerpc/oprofile: Use setup_timer() helper · 83ad1e6a
      Allen Pais authored
      
      
      Use setup_timer function instead of initializing timer with the
      function and data fields.
      Signed-off-by: default avatarAllen Pais <allen.lkml@gmail.com>
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      83ad1e6a
    • Nicholas Piggin's avatar
      powerpc/powernv: Use early_radix_enabled in POWER9 tlb flush · 969a86a2
      Nicholas Piggin authored
      
      
      This code is used at boot and machine checks, so it should be using
      early_radix_enabled() (which is usable any time).
      Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      969a86a2
    • Nicholas Piggin's avatar
      powerpc/powernv: Implement NMI IPI with OPAL_SIGNAL_SYSTEM_RESET · e36d0a2e
      Nicholas Piggin authored
      This allows MSR[EE]=0 lockups to be detected on an OPAL (bare metal)
      system similarly to the hcall NMI IPI on pseries guests, when the
      platform/firmware supports it.
      
      This is an example of CPU10 spinning with interrupts hard disabled:
      
        Watchdog CPU:32 detected Hard LOCKUP other CPUS:10
        Watchdog CPU:10 Hard LOCKUP
        CPU: 10 PID: 4410 Comm: bash Not tainted 4.13.0-rc7-00074-ge89ce1f8-dirty #34
        task: c0000003a82b4400 task.stack: c0000003af55c000
        NIP: c0000000000a7b38 LR: c000000000659044 CTR: c0000000000a7b00
        REGS: c00000000fd23d80 TRAP: 0100   Not tainted  (4.13.0-rc7-00074-ge89ce1f8
      
      -dirty)
        MSR: 90000000000c1033 <SF,HV,ME,IR,DR,RI,LE>
        CR: 28422222  XER: 20000000
        CFAR: c0000000000a7b38 SOFTE: 0
        GPR00: c000000000659044 c0000003af55fbb0 c000000001072a00 0000000000000078
        GPR04: c0000003c81b5c80 c0000003c81cc7e8 9000000000009033 0000000000000000
        GPR08: 0000000000000000 c0000000000a7b00 0000000000000001 9000000000001003
        GPR12: c0000000000a7b00 c00000000fd83200 0000000010180df8 0000000010189e60
        GPR16: 0000000010189ed8 0000000010151270 000000001018bd88 000000001018de78
        GPR20: 00000000370a0668 0000000000000001 00000000101645e0 0000000010163c10
        GPR24: 00007fffd14d6294 00007fffd14d6290 c000000000fba6f0 0000000000000004
        GPR28: c000000000f351d8 0000000000000078 c000000000f4095c 0000000000000000
        NIP [c0000000000a7b38] sysrq_handle_xmon+0x38/0x40
        LR [c000000000659044] __handle_sysrq+0xe4/0x270
        Call Trace:
        [c0000003af55fbd0] [c000000000659044] __handle_sysrq+0xe4/0x270
        [c0000003af55fc70] [c000000000659810] write_sysrq_trigger+0x70/0xa0
        [c0000003af55fca0] [c0000000003da650] proc_reg_write+0xb0/0x110
        [c0000003af55fcf0] [c0000000003423bc] __vfs_write+0x6c/0x1b0
        [c0000003af55fd90] [c000000000344398] vfs_write+0xd8/0x240
        [c0000003af55fde0] [c00000000034632c] SyS_write+0x6c/0x110
        [c0000003af55fe30] [c00000000000b220] system_call+0x58/0x6c
      Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
      [mpe: Use kernel types for opal_signal_system_reset()]
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      e36d0a2e
    • Nicholas Piggin's avatar
      powerpc/64s: Implement system reset idle wakeup reason · 78adf6c2
      Nicholas Piggin authored
      
      
      It is possible to wake from idle due to a system reset exception, in
      which case the CPU takes a system reset interrupt to wake from idle,
      with system reset as the wakeup reason.
      
      The regular (not idle wakeup) system reset interrupt handler must be
      invoked in this case, otherwise the system reset interrupt is lost.
      
      Handle the system reset interrupt immediately after CPU state has been
      restored.
      Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      78adf6c2