dpi.c 8.74 KB
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/*
 * linux/drivers/video/omap2/dss/dpi.c
 *
 * Copyright (C) 2009 Nokia Corporation
 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
 *
 * Some code and ideas taken from drivers/video/omap/ driver
 * by Imre Deak.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published by
 * the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#define DSS_SUBSYS_NAME "DPI"

#include <linux/kernel.h>
#include <linux/delay.h>
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#include <linux/export.h>
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#include <linux/err.h>
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#include <linux/errno.h>
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#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
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#include <video/omapdss.h>
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#include <plat/cpu.h>

#include "dss.h"

static struct {
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	struct regulator *vdds_dsi_reg;
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	struct platform_device *dsidev;
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} dpi;

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static struct platform_device *dpi_get_dsidev(enum omap_dss_clk_source clk)
{
	int dsi_module;

	dsi_module = clk == OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ? 0 : 1;

	return dsi_get_dsidev_from_id(dsi_module);
}

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static bool dpi_use_dsi_pll(struct omap_dss_device *dssdev)
{
	if (dssdev->clocks.dispc.dispc_fclk_src ==
			OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
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			dssdev->clocks.dispc.dispc_fclk_src ==
			OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC ||
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			dssdev->clocks.dispc.channel.lcd_clk_src ==
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			OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
			dssdev->clocks.dispc.channel.lcd_clk_src ==
			OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC)
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		return true;
	else
		return false;
}

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static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft,
		unsigned long pck_req, unsigned long *fck, int *lck_div,
		int *pck_div)
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{
	struct dsi_clock_info dsi_cinfo;
	struct dispc_clock_info dispc_cinfo;
	int r;

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	r = dsi_pll_calc_clock_div_pck(dpi.dsidev, is_tft, pck_req,
			&dsi_cinfo, &dispc_cinfo);
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	if (r)
		return r;

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	r = dsi_pll_set_clock_div(dpi.dsidev, &dsi_cinfo);
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	if (r)
		return r;

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	dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src);
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	r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo);
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	if (r) {
		dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
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		return r;
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	}
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	*fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
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	*lck_div = dispc_cinfo.lck_div;
	*pck_div = dispc_cinfo.pck_div;

	return 0;
}
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static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft,
		unsigned long pck_req, unsigned long *fck, int *lck_div,
		int *pck_div)
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{
	struct dss_clock_info dss_cinfo;
	struct dispc_clock_info dispc_cinfo;
	int r;

	r = dss_calc_clock_div(is_tft, pck_req, &dss_cinfo, &dispc_cinfo);
	if (r)
		return r;

	r = dss_set_clock_div(&dss_cinfo);
	if (r)
		return r;

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	r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo);
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	if (r)
		return r;

	*fck = dss_cinfo.fck;
	*lck_div = dispc_cinfo.lck_div;
	*pck_div = dispc_cinfo.pck_div;

	return 0;
}

static int dpi_set_mode(struct omap_dss_device *dssdev)
{
	struct omap_video_timings *t = &dssdev->panel.timings;
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	int lck_div = 0, pck_div = 0;
	unsigned long fck = 0;
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	unsigned long pck;
	bool is_tft;
	int r = 0;

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	dispc_mgr_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
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			dssdev->panel.acbi, dssdev->panel.acb);
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	is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;

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	if (dpi_use_dsi_pll(dssdev))
		r = dpi_set_dsi_clk(dssdev, is_tft, t->pixel_clock * 1000,
				&fck, &lck_div, &pck_div);
	else
		r = dpi_set_dispc_clk(dssdev, is_tft, t->pixel_clock * 1000,
				&fck, &lck_div, &pck_div);
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	if (r)
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		return r;
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	pck = fck / lck_div / pck_div / 1000;

	if (pck != t->pixel_clock) {
		DSSWARN("Could not find exact pixel clock. "
				"Requested %d kHz, got %lu kHz\n",
				t->pixel_clock, pck);

		t->pixel_clock = pck;
	}

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	dss_mgr_set_timings(dssdev->manager, t);
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	return 0;
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}

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static void dpi_basic_init(struct omap_dss_device *dssdev)
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{
	bool is_tft;

	is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;

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	dispc_mgr_set_io_pad_mode(DSS_IO_PAD_MODE_BYPASS);
	dispc_mgr_enable_stallmode(dssdev->manager->id, false);

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	dispc_mgr_set_lcd_display_type(dssdev->manager->id, is_tft ?
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			OMAP_DSS_LCD_DISPLAY_TFT : OMAP_DSS_LCD_DISPLAY_STN);
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	dispc_mgr_set_tft_data_lines(dssdev->manager->id,
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			dssdev->phy.dpi.data_lines);
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}

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int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
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{
	int r;

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	if (cpu_is_omap34xx() && !dpi.vdds_dsi_reg) {
		DSSERR("no VDSS_DSI regulator\n");
		return -ENODEV;
	}

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	if (dssdev->manager == NULL) {
		DSSERR("failed to enable display: no manager\n");
		return -ENODEV;
	}

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	r = omap_dss_start_device(dssdev);
	if (r) {
		DSSERR("failed to start device\n");
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		goto err_start_dev;
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	}

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	if (cpu_is_omap34xx()) {
		r = regulator_enable(dpi.vdds_dsi_reg);
		if (r)
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			goto err_reg_enable;
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	}

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	r = dss_runtime_get();
	if (r)
		goto err_get_dss;
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	r = dispc_runtime_get();
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	if (r)
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		goto err_get_dispc;

	dpi_basic_init(dssdev);
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	if (dpi_use_dsi_pll(dssdev)) {
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		r = dsi_runtime_get(dpi.dsidev);
		if (r)
			goto err_get_dsi;

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		r = dsi_pll_init(dpi.dsidev, 0, 1);
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		if (r)
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			goto err_dsi_pll_init;
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	}

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	r = dpi_set_mode(dssdev);
	if (r)
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		goto err_set_mode;
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	mdelay(2);

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	r = dss_mgr_enable(dssdev->manager);
	if (r)
		goto err_mgr_enable;
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	return 0;

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err_mgr_enable:
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err_set_mode:
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	if (dpi_use_dsi_pll(dssdev))
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		dsi_pll_uninit(dpi.dsidev, true);
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err_dsi_pll_init:
	if (dpi_use_dsi_pll(dssdev))
		dsi_runtime_put(dpi.dsidev);
err_get_dsi:
	dispc_runtime_put();
err_get_dispc:
	dss_runtime_put();
err_get_dss:
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	if (cpu_is_omap34xx())
		regulator_disable(dpi.vdds_dsi_reg);
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err_reg_enable:
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	omap_dss_stop_device(dssdev);
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err_start_dev:
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	return r;
}
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EXPORT_SYMBOL(omapdss_dpi_display_enable);
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void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
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{
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	dss_mgr_disable(dssdev->manager);
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	if (dpi_use_dsi_pll(dssdev)) {
		dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
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		dsi_pll_uninit(dpi.dsidev, true);
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		dsi_runtime_put(dpi.dsidev);
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	}
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	dispc_runtime_put();
	dss_runtime_put();
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	if (cpu_is_omap34xx())
		regulator_disable(dpi.vdds_dsi_reg);

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	omap_dss_stop_device(dssdev);
}
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EXPORT_SYMBOL(omapdss_dpi_display_disable);
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void dpi_set_timings(struct omap_dss_device *dssdev,
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			struct omap_video_timings *timings)
{
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	int r;

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	DSSDBG("dpi_set_timings\n");
	dssdev->panel.timings = *timings;
	if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
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		r = dss_runtime_get();
		if (r)
			return;

		r = dispc_runtime_get();
		if (r) {
			dss_runtime_put();
			return;
		}

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		dpi_set_mode(dssdev);
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		dispc_runtime_put();
		dss_runtime_put();
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	} else {
		dss_mgr_set_timings(dssdev->manager, timings);
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	}
}
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EXPORT_SYMBOL(dpi_set_timings);
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int dpi_check_timings(struct omap_dss_device *dssdev,
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			struct omap_video_timings *timings)
{
	bool is_tft;
	int r;
	int lck_div, pck_div;
	unsigned long fck;
	unsigned long pck;
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	struct dispc_clock_info dispc_cinfo;
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	if (dss_mgr_check_timings(dssdev->manager, timings))
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		return -EINVAL;

	if (timings->pixel_clock == 0)
		return -EINVAL;

	is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;

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	if (dpi_use_dsi_pll(dssdev)) {
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		struct dsi_clock_info dsi_cinfo;
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		r = dsi_pll_calc_clock_div_pck(dpi.dsidev, is_tft,
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				timings->pixel_clock * 1000,
				&dsi_cinfo, &dispc_cinfo);

		if (r)
			return r;

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		fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
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	} else {
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		struct dss_clock_info dss_cinfo;
		r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000,
				&dss_cinfo, &dispc_cinfo);

		if (r)
			return r;

		fck = dss_cinfo.fck;
	}
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	lck_div = dispc_cinfo.lck_div;
	pck_div = dispc_cinfo.pck_div;
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	pck = fck / lck_div / pck_div / 1000;

	timings->pixel_clock = pck;

	return 0;
}
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EXPORT_SYMBOL(dpi_check_timings);
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int dpi_init_display(struct omap_dss_device *dssdev)
{
	DSSDBG("init_display\n");

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	if (cpu_is_omap34xx() && dpi.vdds_dsi_reg == NULL) {
		struct regulator *vdds_dsi;
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		vdds_dsi = dss_get_vdds_dsi();

		if (IS_ERR(vdds_dsi)) {
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			DSSERR("can't get VDDS_DSI regulator\n");
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			return PTR_ERR(vdds_dsi);
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		}
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		dpi.vdds_dsi_reg = vdds_dsi;
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	}

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	if (dpi_use_dsi_pll(dssdev)) {
		enum omap_dss_clk_source dispc_fclk_src =
			dssdev->clocks.dispc.dispc_fclk_src;
		dpi.dsidev = dpi_get_dsidev(dispc_fclk_src);
	}

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	return 0;
}

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static int omap_dpi_probe(struct platform_device *pdev)
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{
	return 0;
}

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static int omap_dpi_remove(struct platform_device *pdev)
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{
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	return 0;
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}

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static struct platform_driver omap_dpi_driver = {
	.probe		= omap_dpi_probe,
	.remove         = omap_dpi_remove,
	.driver         = {
		.name   = "omapdss_dpi",
		.owner  = THIS_MODULE,
	},
};

int dpi_init_platform_driver(void)
{
	return platform_driver_register(&omap_dpi_driver);
}

void dpi_uninit_platform_driver(void)
{
	platform_driver_unregister(&omap_dpi_driver);
}