• Gavin Shan's avatar
    powerpc/powernv: Reserve the correct PE number · 36954dc7
    Gavin Shan authored
    We're assigning PE numbers after the completion of PCI probe. During
    the PCI probe, we had PE#0 as the super container to encompass all
    PCI devices. However, that's inappropriate since PELTM has ascending
    order of priority on search on P7IOC. So we need PE#127 takes the
    role that PE#0 has previously. For PHB3, we still have PE#0 as the
    reserved PE.
    The patch supposes that the underly firmware has built the RID to
    PE# mapping after resetting IODA tables: all PELTM entries except
    last one has invalid mapping on P7IOC, but all RTEs have binding
    to PE#0. The reserved PE# is being exported by firmware by device
    Signed-off-by: default avatarGavin Shan <shangw@linux.vnet.ibm.com>
    Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
pci.h 4.98 KB