• Linus Torvalds's avatar
    Fix potential fast PIT TSC calibration startup glitch · a6a80e1d
    Linus Torvalds authored
    
    
    During bootup, when we reprogram the PIT (programmable interval timer)
    to start counting down from 0xffff in order to use it for the fast TSC
    calibration, we should also make sure to delay a bit afterwards to allow
    the PIT hardware to actually start counting with the new value.
    
    That will happens at the next CLK pulse (1.193182 MHz), so the easiest
    way to do that is to just wait at least one microsecond after
    programming the new PIT counter value.  We do that by just reading the
    counter value back once - which will take about 2us on PC hardware.
    Reported-and-tested-by: default avatarjohn stultz <johnstul@us.ibm.com>
    Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
    a6a80e1d