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  • Yuvaraj Kumar C D's avatar
    ARM: exynos: dts: Update 5250 arch timer node with clock frequency · 4d594dd3
    Yuvaraj Kumar C D authored
    
    
    Without the "clock-frequency" property in arch timer node, could able
    to see the below crash dump.
    
    [<c0014e28>] (unwind_backtrace+0x0/0xf4) from [<c0011808>] (show_stack+0x10/0x14)
    [<c0011808>] (show_stack+0x10/0x14) from [<c036ac1c>] (dump_stack+0x7c/0xb0)
    [<c036ac1c>] (dump_stack+0x7c/0xb0) from [<c01ab760>] (Ldiv0_64+0x8/0x18)
    [<c01ab760>] (Ldiv0_64+0x8/0x18) from [<c0062f60>] (clockevents_config.part.2+0x1c/0x74)
    [<c0062f60>] (clockevents_config.part.2+0x1c/0x74) from [<c0062fd8>] (clockevents_config_and_register+0x20/0x2c)
    [<c0062fd8>] (clockevents_config_and_register+0x20/0x2c) from [<c02b8e8c>] (arch_timer_setup+0xa8/0x134)
    [<c02b8e8c>] (arch_timer_setup+0xa8/0x134) from [<c04b47b4>] (arch_timer_init+0x1f4/0x24c)
    [<c04b47b4>] (arch_timer_init+0x1f4/0x24c) from [<c04b40d8>] (clocksource_of_init+0x34/0x58)
    [<c04b40d8>] (clocksource_of_init+0x34/0x58) from [<c049ed8c>] (time_init+0x20/0x2c)
    [<c049ed8c>] (time_init+0x20/0x2c) from [<c049b95c>] (start_kernel+0x1e0/0x39c)
    
    THis is because the Exynos u-boot, for example on the Chromebooks, doesn't set
    up the CNTFRQ register as expected by arch_timer. Instead, we have to specify
    the frequency in the device tree like this.
    
    Signed-off-by: default avatarYuvaraj Kumar C D <yuvaraj.cd@samsung.com>
    [olof: Changed subject, added comment, elaborated on commit message]
    Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
    4d594dd3