Commit 1d2d87e8 authored by Horia Geantă's avatar Horia Geantă Committed by Herbert Xu
Browse files

crypto: caam - fix echainiv(authenc) encrypt shared descriptor

There are a few things missed by the conversion to the
new AEAD interface:

1 - echainiv(authenc) encrypt shared descriptor

The shared descriptor is incorrect: due to the order of operations,
at some point in time MATH3 register is being overwritten.

2 - buffer used for echainiv(authenc) encrypt shared descriptor

Encrypt and givencrypt shared descriptors (for AEAD ops) are mutually
exclusive and thus use the same buffer in context state: sh_desc_enc.

However, there's one place missed by s/sh_desc_givenc/sh_desc_enc,
leading to errors when echainiv(authenc(...)) algorithms are used:
DECO: desc idx 14: Header Error. Invalid length or parity, or
certain other problems.

While here, also fix a typo: dma_mapping_error() is checking
for validity of sh_desc_givenc_dma instead of sh_desc_enc_dma.

Cc: <stable@vger.kernel.org> # 4.3+
Fixes: 479bcc7c

 ("crypto: caam - Convert authenc to new AEAD interface")
Signed-off-by: default avatarHoria Geantă <horia.geanta@nxp.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent f743e70e
...@@ -614,7 +614,7 @@ static int aead_set_sh_desc(struct crypto_aead *aead) ...@@ -614,7 +614,7 @@ static int aead_set_sh_desc(struct crypto_aead *aead)
keys_fit_inline = true; keys_fit_inline = true;
/* aead_givencrypt shared descriptor */ /* aead_givencrypt shared descriptor */
desc = ctx->sh_desc_givenc; desc = ctx->sh_desc_enc;
/* Note: Context registers are saved. */ /* Note: Context registers are saved. */
init_sh_desc_key_aead(desc, ctx, keys_fit_inline, is_rfc3686); init_sh_desc_key_aead(desc, ctx, keys_fit_inline, is_rfc3686);
...@@ -645,13 +645,13 @@ static int aead_set_sh_desc(struct crypto_aead *aead) ...@@ -645,13 +645,13 @@ static int aead_set_sh_desc(struct crypto_aead *aead)
append_operation(desc, ctx->class2_alg_type | append_operation(desc, ctx->class2_alg_type |
OP_ALG_AS_INITFINAL | OP_ALG_ENCRYPT); OP_ALG_AS_INITFINAL | OP_ALG_ENCRYPT);
/* ivsize + cryptlen = seqoutlen - authsize */
append_math_sub_imm_u32(desc, REG3, SEQOUTLEN, IMM, ctx->authsize);
/* Read and write assoclen bytes */ /* Read and write assoclen bytes */
append_math_add(desc, VARSEQINLEN, ZERO, REG3, CAAM_CMD_SZ); append_math_add(desc, VARSEQINLEN, ZERO, REG3, CAAM_CMD_SZ);
append_math_add(desc, VARSEQOUTLEN, ZERO, REG3, CAAM_CMD_SZ); append_math_add(desc, VARSEQOUTLEN, ZERO, REG3, CAAM_CMD_SZ);
/* ivsize + cryptlen = seqoutlen - authsize */
append_math_sub_imm_u32(desc, REG3, SEQOUTLEN, IMM, ctx->authsize);
/* Skip assoc data */ /* Skip assoc data */
append_seq_fifo_store(desc, 0, FIFOST_TYPE_SKIP | FIFOLDST_VLF); append_seq_fifo_store(desc, 0, FIFOST_TYPE_SKIP | FIFOLDST_VLF);
...@@ -697,7 +697,7 @@ static int aead_set_sh_desc(struct crypto_aead *aead) ...@@ -697,7 +697,7 @@ static int aead_set_sh_desc(struct crypto_aead *aead)
ctx->sh_desc_enc_dma = dma_map_single(jrdev, desc, ctx->sh_desc_enc_dma = dma_map_single(jrdev, desc,
desc_bytes(desc), desc_bytes(desc),
DMA_TO_DEVICE); DMA_TO_DEVICE);
if (dma_mapping_error(jrdev, ctx->sh_desc_givenc_dma)) { if (dma_mapping_error(jrdev, ctx->sh_desc_enc_dma)) {
dev_err(jrdev, "unable to map shared descriptor\n"); dev_err(jrdev, "unable to map shared descriptor\n");
return -ENOMEM; return -ENOMEM;
} }
......
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