Commit 6aba74f2 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'irq-fixes-for-linus' of...

Merge branch 'irq-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'irq-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  avr32: Fix missing irq namespace conversion
  powerpc: qe_ic: Rename get_irq_desc_data and get_irq_desc_chip
  genirq: Remove the now obsolete config options and select statements
  arm: versatile : Fix typo introduced in irq namespace cleanup
  sound: Fixup the last user of the old irq functions
  genirq: Remove obsolete comment
  genirq: Remove now obsolete set_irq_wake()
  sh: Fix irq cleanup fallout
  x86: apb_timer: Fixup genirq fallout
  genirq: Fix misnamed label in handle_edge_eoi_irq

Fix up crazy conflict in arch/powerpc/include/asm/qe_ic.h:

 - commit eead4d5c ("powerpc: qe_ic: Rename get_irq_desc_data and
   get_irq_desc_chip") made the helper functions use
   irq_desc_get_handler_data() instead of the legacy (and no longer
   existing) get_irq_desc_data.

 - commit d4db35e8 ("powerpc/qe_ic: Fix another breakage from the
   irq_data conversion") used irq_desc_get_chip_data() instead.

According to Thomas, the former is the correct direct conversion, but it
does look like both should work (arch/powerpc/sysdev/qe_lib/qe_ic.c
seems to initialize both to the same thing), and the chip data in some
ways is the more logical.  Somebody should really decide on one of the
other.

This merge picks irq_desc_get_handler_data() as the straightforward pure
conversion to new names, as per Thomas.
parents a8e498b7 dd8ea6af
......@@ -12,7 +12,6 @@ config ALPHA
select GENERIC_IRQ_PROBE
select AUTO_IRQ_AFFINITY if SMP
select GENERIC_IRQ_SHOW
select GENERIC_HARDIRQS_NO_DEPRECATED
help
The Alpha is a 64-bit general-purpose processor designed and
marketed by the Digital Equipment Corporation of blessed memory,
......
......@@ -314,7 +314,7 @@ static struct mmci_platform_data mmc0_plat_data = {
.gpio_cd = -1,
};
static struct resource chalcd_resources[] = {
static struct resource char_lcd_resources[] = {
{
.start = VERSATILE_CHAR_LCD_BASE,
.end = (VERSATILE_CHAR_LCD_BASE + SZ_4K - 1),
......
......@@ -10,7 +10,6 @@ config AVR32
select GENERIC_IRQ_PROBE
select HARDIRQS_SW_RESEND
select GENERIC_IRQ_SHOW
select GENERIC_HARDIRQS_NO_DEPRECATED
help
AVR32 is a high-performance 32-bit RISC microprocessor core,
designed for cost-sensitive embedded applications, with particular
......
......@@ -282,7 +282,7 @@ static struct irq_chip gpio_irqchip = {
static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
{
struct pio_device *pio = get_irq_desc_chip_data(desc);
struct pio_device *pio = irq_desc_get_chip_data(desc);
unsigned gpio_irq;
gpio_irq = (unsigned) irq_get_handler_data(irq);
......
......@@ -34,7 +34,6 @@ config BLACKFIN
select GENERIC_ATOMIC64
select GENERIC_IRQ_PROBE
select IRQ_PER_CPU if SMP
select GENERIC_HARDIRQS_NO_DEPRECATED
config GENERIC_CSUM
def_bool y
......
......@@ -55,7 +55,6 @@ config CRIS
default y
select HAVE_IDE
select HAVE_GENERIC_HARDIRQS
select GENERIC_HARDIRQS_NO_DEPRECATED
select GENERIC_IRQ_SHOW
config HZ
......
......@@ -7,7 +7,6 @@ config FRV
select HAVE_PERF_EVENTS
select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_SHOW
select GENERIC_HARDIRQS_NO_DEPRECATED
config ZONE_DMA
bool
......
......@@ -3,7 +3,6 @@ config H8300
default y
select HAVE_IDE
select HAVE_GENERIC_HARDIRQS
select GENERIC_HARDIRQS_NO_DEPRECATED
select GENERIC_IRQ_SHOW
config SYMBOL_PREFIX
......
......@@ -8,7 +8,6 @@ config M32R
select HAVE_KERNEL_BZIP2
select HAVE_KERNEL_LZMA
select HAVE_GENERIC_HARDIRQS
select GENERIC_HARDIRQS_NO_DEPRECATED
select GENERIC_IRQ_PROBE
select GENERIC_IRQ_SHOW
......
......@@ -5,7 +5,6 @@ config M68K
select HAVE_AOUT if MMU
select GENERIC_ATOMIC64 if MMU
select HAVE_GENERIC_HARDIRQS if !MMU
select GENERIC_HARDIRQS_NO_DEPRECATED if !MMU
config RWSEM_GENERIC_SPINLOCK
bool
......
......@@ -17,7 +17,6 @@ config MICROBLAZE
select OF_EARLY_FLATTREE
select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_PROBE
select GENERIC_HARDIRQS_NO_DEPRECATED
select GENERIC_IRQ_SHOW
config SWAP
......
......@@ -2,7 +2,6 @@ config MN10300
def_bool y
select HAVE_OPROFILE
select HAVE_GENERIC_HARDIRQS
select GENERIC_HARDIRQS_NO_DEPRECATED
select GENERIC_IRQ_SHOW
select HAVE_ARCH_TRACEHOOK
select HAVE_ARCH_KGDB
......
......@@ -15,7 +15,6 @@ config PARISC
select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_PROBE
select IRQ_PER_CPU
select GENERIC_HARDIRQS_NO_DEPRECATED
help
The PA-RISC microprocessor is designed by Hewlett-Packard and used
......
......@@ -138,7 +138,6 @@ config PPC
select HAVE_GENERIC_HARDIRQS
select HAVE_SPARSE_IRQ
select IRQ_PER_CPU
select GENERIC_HARDIRQS_NO_DEPRECATED
select GENERIC_IRQ_SHOW
select GENERIC_IRQ_SHOW_LEVEL
......
......@@ -81,7 +81,7 @@ int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int high);
static inline void qe_ic_cascade_low_ipic(unsigned int irq,
struct irq_desc *desc)
{
struct qe_ic *qe_ic = irq_desc_get_chip_data(desc);
struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
if (cascade_irq != NO_IRQ)
......@@ -91,7 +91,7 @@ static inline void qe_ic_cascade_low_ipic(unsigned int irq,
static inline void qe_ic_cascade_high_ipic(unsigned int irq,
struct irq_desc *desc)
{
struct qe_ic *qe_ic = irq_desc_get_chip_data(desc);
struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
if (cascade_irq != NO_IRQ)
......@@ -101,7 +101,7 @@ static inline void qe_ic_cascade_high_ipic(unsigned int irq,
static inline void qe_ic_cascade_low_mpic(unsigned int irq,
struct irq_desc *desc)
{
struct qe_ic *qe_ic = irq_desc_get_chip_data(desc);
struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
struct irq_chip *chip = irq_desc_get_chip(desc);
......@@ -114,7 +114,7 @@ static inline void qe_ic_cascade_low_mpic(unsigned int irq,
static inline void qe_ic_cascade_high_mpic(unsigned int irq,
struct irq_desc *desc)
{
struct qe_ic *qe_ic = irq_desc_get_chip_data(desc);
struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
struct irq_chip *chip = irq_desc_get_chip(desc);
......@@ -127,7 +127,7 @@ static inline void qe_ic_cascade_high_mpic(unsigned int irq,
static inline void qe_ic_cascade_muxed_mpic(unsigned int irq,
struct irq_desc *desc)
{
struct qe_ic *qe_ic = irq_desc_get_chip_data(desc);
struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
unsigned int cascade_irq;
struct irq_chip *chip = irq_desc_get_chip(desc);
......
......@@ -3,7 +3,6 @@ menu "Machine selection"
config SCORE
def_bool y
select HAVE_GENERIC_HARDIRQS
select GENERIC_HARDIRQS_NO_DEPRECATED
select GENERIC_IRQ_SHOW
choice
......
......@@ -23,7 +23,6 @@ config SUPERH
select HAVE_SPARSE_IRQ
select RTC_LIB
select GENERIC_ATOMIC64
select GENERIC_HARDIRQS_NO_DEPRECATED
select GENERIC_IRQ_SHOW
help
The SuperH is a RISC processor targeted for use in embedded systems
......
......@@ -51,7 +51,6 @@ config SPARC64
select HAVE_PERF_EVENTS
select PERF_USE_VMALLOC
select HAVE_GENERIC_HARDIRQS
select GENERIC_HARDIRQS_NO_DEPRECATED
select GENERIC_IRQ_SHOW
select IRQ_PREFLOW_FASTEOI
......
......@@ -11,7 +11,6 @@ config TILE
select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_PROBE
select GENERIC_PENDING_IRQ if SMP
select GENERIC_HARDIRQS_NO_DEPRECATED
select GENERIC_IRQ_SHOW
# FIXME: investigate whether we need/want these options.
......
......@@ -7,7 +7,6 @@ config UML
bool
default y
select HAVE_GENERIC_HARDIRQS
select GENERIC_HARDIRQS_NO_DEPRECATED
select GENERIC_IRQ_SHOW
config MMU
......
......@@ -10,7 +10,6 @@ config UNICORE32
select HAVE_KERNEL_LZMA
select GENERIC_FIND_FIRST_BIT
select GENERIC_IRQ_PROBE
select GENERIC_HARDIRQS_NO_DEPRECATED
select GENERIC_IRQ_SHOW
select ARCH_WANT_FRAME_POINTERS
help
......
......@@ -316,7 +316,7 @@ static void apbt_setup_irq(struct apbt_dev *adev)
irq_modify_status(adev->irq, 0, IRQ_MOVE_PCNTXT);
irq_set_affinity(adev->irq, cpumask_of(adev->cpu));
/* APB timer irqs are set up as mp_irqs, timer is edge type */
__set_irq_handler(adev->irq, handle_edge_irq, 0, "edge");
__irq_set_handler(adev->irq, handle_edge_irq, 0, "edge");
if (system_state == SYSTEM_BOOTING) {
if (request_irq(adev->irq, apbt_interrupt_handler,
......
......@@ -9,7 +9,6 @@ config XTENSA
select HAVE_IDE
select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_SHOW
select GENERIC_HARDIRQS_NO_DEPRECATED
help
Xtensa processors are 32-bit RISC machines designed by Tensilica
primarily for embedded systems. These processors are both
......
......@@ -86,7 +86,7 @@ enum { MODE_ENABLE_REG = 0, /* Bit(s) set -> interrupt enabled */
static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
{
struct irq_chip *chip = get_irq_chip(irq);
struct irq_chip *chip = irq_get_chip(irq);
return container_of(chip, struct intc_desc_int, chip);
}
......@@ -103,7 +103,7 @@ static inline void activate_irq(int irq)
set_irq_flags(irq, IRQF_VALID);
#else
/* same effect on other architectures */
set_irq_noprobe(irq);
irq_set_noprobe(irq);
#endif
}
......
......@@ -338,14 +338,6 @@ static inline void enable_irq_lockdep_irqrestore(unsigned int irq, unsigned long
/* IRQ wakeup (PM) control: */
extern int irq_set_irq_wake(unsigned int irq, unsigned int on);
#ifndef CONFIG_GENERIC_HARDIRQS_NO_COMPAT
/* Please do not use: Use the replacement functions instead */
static inline int set_irq_wake(unsigned int irq, unsigned int on)
{
return irq_set_irq_wake(irq, on);
}
#endif
static inline int enable_irq_wake(unsigned int irq)
{
return irq_set_irq_wake(irq, 1);
......
......@@ -64,13 +64,6 @@ typedef void (*irq_preflow_handler_t)(struct irq_data *data);
* IRQ_NO_BALANCING - Interrupt cannot be balanced (affinity set)
* IRQ_MOVE_PCNTXT - Interrupt can be migrated from process context
* IRQ_NESTED_TRHEAD - Interrupt nests into another thread
*
* Deprecated bits. They are kept updated as long as
* CONFIG_GENERIC_HARDIRQS_NO_COMPAT is not set. Will go away soon. These bits
* are internal state of the core code and if you really need to acces
* them then talk to the genirq maintainer instead of hacking
* something weird.
*
*/
enum {
IRQ_TYPE_NONE = 0x00000000,
......
......@@ -10,9 +10,6 @@ menu "IRQ subsystem"
config GENERIC_HARDIRQS
def_bool y
config GENERIC_HARDIRQS_NO_COMPAT
bool
# Options selectable by the architecture code
# Make sparse irq Kconfig switch below available
......
......@@ -331,7 +331,7 @@ int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
goto err;
if (gpios[i].wake) {
ret = set_irq_wake(gpio_to_irq(gpios[i].gpio), 1);
ret = irq_set_irq_wake(gpio_to_irq(gpios[i].gpio), 1);
if (ret != 0)
printk(KERN_ERR
"Failed to mark GPIO %d as wake source: %d\n",
......
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