Commit 7632b30e authored by Ben Skeggs's avatar Ben Skeggs
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drm/nouveau/clk: namespace + nvidia gpu names (no binary change)



The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 5f8824de
......@@ -201,5 +201,23 @@
#define nouveau_bios_oclass nvkm_bios_oclass
#define nouveau_pll_vals nvkm_pll_vals
#define nouveau_therm_trip_point nvkm_therm_trip_point
#define nouveau_fb nvkm_fb
#define nouveau_fifo nvkm_fifo
#define nouveau_therm nvkm_therm
#define nouveau_therm_cstate nvkm_therm_cstate
#define nouveau_volt nvkm_volt
#define nouveau_timer nvkm_timer
#define nouveau_timer_wait_eq nvkm_timer_wait_eq
#define nva3_pll_calc gt215_pll_calc
#define nouveau_clk nvkm_clk
#define nouveau_domain nvkm_domain
#define nouveau_cstate nvkm_cstate
#define nouveau_pstate nvkm_pstate
#define nouveau_clk_astate nvkm_clk_astate
#define nouveau_clk_ustate nvkm_clk_ustate
#define nva3_clk_pre gt215_clk_pre
#define nva3_clk_post gt215_clk_post
#define nva3_clk_info gt215_clk_info
#define nva3_pll_info gt215_pll_info
#endif
#ifndef __NOUVEAU_CLK_H__
#define __NOUVEAU_CLK_H__
#include <core/device.h>
#include <core/notify.h>
#ifndef __NVKM_CLK_H__
#define __NVKM_CLK_H__
#include <core/subdev.h>
struct nouveau_pll_vals;
#include <core/notify.h>
struct nvbios_pll;
struct nvkm_pll_vals;
enum nv_clk_src {
nv_clk_src_crystal,
......@@ -50,25 +47,34 @@ enum nv_clk_src {
nv_clk_src_max,
};
struct nouveau_cstate {
struct nvkm_cstate {
struct list_head head;
u8 voltage;
u32 domain[nv_clk_src_max];
};
struct nouveau_pstate {
struct nvkm_pstate {
struct list_head head;
struct list_head list; /* c-states */
struct nouveau_cstate base;
struct nvkm_cstate base;
u8 pstate;
u8 fanspeed;
};
struct nouveau_clk {
struct nouveau_subdev base;
struct nvkm_domain {
enum nv_clk_src name;
u8 bios; /* 0xff for none */
#define NVKM_CLK_DOM_FLAG_CORE 0x01
u8 flags;
const char *mname;
int mdiv;
};
struct nouveau_domain *domains;
struct nouveau_pstate bstate;
struct nvkm_clk {
struct nvkm_subdev base;
struct nvkm_domain *domains;
struct nvkm_pstate bstate;
struct list_head states;
int state_nr;
......@@ -88,80 +94,68 @@ struct nouveau_clk {
bool allow_reclock;
int (*read)(struct nouveau_clk *, enum nv_clk_src);
int (*calc)(struct nouveau_clk *, struct nouveau_cstate *);
int (*prog)(struct nouveau_clk *);
void (*tidy)(struct nouveau_clk *);
int (*read)(struct nvkm_clk *, enum nv_clk_src);
int (*calc)(struct nvkm_clk *, struct nvkm_cstate *);
int (*prog)(struct nvkm_clk *);
void (*tidy)(struct nvkm_clk *);
/*XXX: die, these are here *only* to support the completely
* bat-shit insane what-was-nouveau_hw.c code
* bat-shit insane what-was-nvkm_hw.c code
*/
int (*pll_calc)(struct nouveau_clk *, struct nvbios_pll *,
int clk, struct nouveau_pll_vals *pv);
int (*pll_prog)(struct nouveau_clk *, u32 reg1,
struct nouveau_pll_vals *pv);
int (*pll_calc)(struct nvkm_clk *, struct nvbios_pll *, int clk,
struct nvkm_pll_vals *pv);
int (*pll_prog)(struct nvkm_clk *, u32 reg1, struct nvkm_pll_vals *pv);
};
static inline struct nouveau_clk *
nouveau_clk(void *obj)
static inline struct nvkm_clk *
nvkm_clk(void *obj)
{
return (void *)nouveau_subdev(obj, NVDEV_SUBDEV_CLK);
return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_CLK);
}
struct nouveau_domain {
enum nv_clk_src name;
u8 bios; /* 0xff for none */
#define NVKM_CLK_DOM_FLAG_CORE 0x01
u8 flags;
const char *mname;
int mdiv;
};
#define nouveau_clk_create(p,e,o,i,r,s,n,d) \
nouveau_clk_create_((p), (e), (o), (i), (r), (s), (n), sizeof(**d), \
#define nvkm_clk_create(p,e,o,i,r,s,n,d) \
nvkm_clk_create_((p), (e), (o), (i), (r), (s), (n), sizeof(**d), \
(void **)d)
#define nouveau_clk_destroy(p) ({ \
struct nouveau_clk *clk = (p); \
_nouveau_clk_dtor(nv_object(clk)); \
#define nvkm_clk_destroy(p) ({ \
struct nvkm_clk *clk = (p); \
_nvkm_clk_dtor(nv_object(clk)); \
})
#define nouveau_clk_init(p) ({ \
struct nouveau_clk *clk = (p); \
_nouveau_clk_init(nv_object(clk)); \
#define nvkm_clk_init(p) ({ \
struct nvkm_clk *clk = (p); \
_nvkm_clk_init(nv_object(clk)); \
})
#define nouveau_clk_fini(p,s) ({ \
struct nouveau_clk *clk = (p); \
_nouveau_clk_fini(nv_object(clk), (s)); \
#define nvkm_clk_fini(p,s) ({ \
struct nvkm_clk *clk = (p); \
_nvkm_clk_fini(nv_object(clk), (s)); \
})
int nouveau_clk_create_(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *,
struct nouveau_domain *, struct nouveau_pstate *,
int nvkm_clk_create_(struct nvkm_object *, struct nvkm_object *,
struct nvkm_oclass *,
struct nvkm_domain *, struct nvkm_pstate *,
int, bool, int, void **);
void _nouveau_clk_dtor(struct nouveau_object *);
int _nouveau_clk_init(struct nouveau_object *);
int _nouveau_clk_fini(struct nouveau_object *, bool);
extern struct nouveau_oclass nv04_clk_oclass;
extern struct nouveau_oclass nv40_clk_oclass;
extern struct nouveau_oclass *nv50_clk_oclass;
extern struct nouveau_oclass *nv84_clk_oclass;
extern struct nouveau_oclass *nvaa_clk_oclass;
extern struct nouveau_oclass nva3_clk_oclass;
extern struct nouveau_oclass nvc0_clk_oclass;
extern struct nouveau_oclass nve0_clk_oclass;
extern struct nouveau_oclass gk20a_clk_oclass;
int nv04_clk_pll_set(struct nouveau_clk *, u32 type, u32 freq);
int nv04_clk_pll_calc(struct nouveau_clk *, struct nvbios_pll *,
int clk, struct nouveau_pll_vals *);
int nv04_clk_pll_prog(struct nouveau_clk *, u32 reg1,
struct nouveau_pll_vals *);
int nva3_clk_pll_calc(struct nouveau_clk *, struct nvbios_pll *,
int clk, struct nouveau_pll_vals *);
int nouveau_clk_ustate(struct nouveau_clk *, int req, int pwr);
int nouveau_clk_astate(struct nouveau_clk *, int req, int rel, bool wait);
int nouveau_clk_dstate(struct nouveau_clk *, int req, int rel);
int nouveau_clk_tstate(struct nouveau_clk *, int req, int rel);
void _nvkm_clk_dtor(struct nvkm_object *);
int _nvkm_clk_init(struct nvkm_object *);
int _nvkm_clk_fini(struct nvkm_object *, bool);
extern struct nvkm_oclass nv04_clk_oclass;
extern struct nvkm_oclass nv40_clk_oclass;
extern struct nvkm_oclass *nv50_clk_oclass;
extern struct nvkm_oclass *g84_clk_oclass;
extern struct nvkm_oclass *mcp77_clk_oclass;
extern struct nvkm_oclass gt215_clk_oclass;
extern struct nvkm_oclass gf100_clk_oclass;
extern struct nvkm_oclass gk104_clk_oclass;
extern struct nvkm_oclass gk20a_clk_oclass;
int nv04_clk_pll_set(struct nvkm_clk *, u32 type, u32 freq);
int nv04_clk_pll_calc(struct nvkm_clk *, struct nvbios_pll *, int clk,
struct nvkm_pll_vals *);
int nv04_clk_pll_prog(struct nvkm_clk *, u32 reg1, struct nvkm_pll_vals *);
int gt215_clk_pll_calc(struct nvkm_clk *, struct nvbios_pll *,
int clk, struct nvkm_pll_vals *);
int nvkm_clk_ustate(struct nvkm_clk *, int req, int pwr);
int nvkm_clk_astate(struct nvkm_clk *, int req, int rel, bool wait);
int nvkm_clk_dstate(struct nvkm_clk *, int req, int rel);
int nvkm_clk_tstate(struct nvkm_clk *, int req, int rel);
#endif
......@@ -65,7 +65,7 @@ gm100_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nvd0_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nve0_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gm107_devinit_oclass;
......@@ -107,7 +107,7 @@ gm100_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
#if 0
/* looks to be some non-trivial changes */
device->oclass[NVDEV_SUBDEV_CLK ] = &nve0_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
/* priv ring says no to 0x10eb14 writes */
device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
#endif
......
......@@ -93,7 +93,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = nv84_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv84_devinit_oclass;
......@@ -122,7 +122,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = nv84_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv84_devinit_oclass;
......@@ -151,7 +151,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = nv84_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv84_devinit_oclass;
......@@ -180,7 +180,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = nv84_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv84_devinit_oclass;
......@@ -209,7 +209,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = nv84_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv84_devinit_oclass;
......@@ -238,7 +238,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = nv84_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv98_devinit_oclass;
......@@ -267,7 +267,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = nv84_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv84_devinit_oclass;
......@@ -296,7 +296,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = nvaa_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = mcp77_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv98_devinit_oclass;
......@@ -325,7 +325,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = nvaa_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = mcp77_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv98_devinit_oclass;
......@@ -354,7 +354,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nva3_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gt215_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nva3_devinit_oclass;
......@@ -385,7 +385,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nva3_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gt215_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nva3_devinit_oclass;
......@@ -415,7 +415,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nva3_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gt215_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nva3_devinit_oclass;
......@@ -445,7 +445,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nva3_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gt215_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvaf_devinit_oclass;
......
......@@ -65,7 +65,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nvc0_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
......@@ -98,7 +98,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nvc0_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
......@@ -131,7 +131,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nvc0_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
......@@ -163,7 +163,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nvc0_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
......@@ -196,7 +196,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nvc0_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
......@@ -228,7 +228,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nvc0_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
......@@ -260,7 +260,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nvc0_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
......@@ -293,7 +293,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nvd0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nvd0_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nvc0_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
......@@ -325,7 +325,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nvd0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = gf117_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nvc0_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
......
......@@ -65,7 +65,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nve0_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
......@@ -99,7 +99,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nve0_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
......@@ -133,7 +133,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nve0_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
......@@ -189,7 +189,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nve0_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
......@@ -223,7 +223,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nvd0_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nve0_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
......@@ -257,7 +257,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nve0_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
......@@ -290,7 +290,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &nve0_clk_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
......
......@@ -2,11 +2,11 @@ nvkm-y += nvkm/subdev/clk/base.o
nvkm-y += nvkm/subdev/clk/nv04.o
nvkm-y += nvkm/subdev/clk/nv40.o
nvkm-y += nvkm/subdev/clk/nv50.o
nvkm-y += nvkm/subdev/clk/nv84.o
nvkm-y += nvkm/subdev/clk/nva3.o
nvkm-y += nvkm/subdev/clk/nvaa.o
nvkm-y += nvkm/subdev/clk/nvc0.o
nvkm-y += nvkm/subdev/clk/nve0.o
nvkm-y += nvkm/subdev/clk/g84.o
nvkm-y += nvkm/subdev/clk/gt215.o
nvkm-y += nvkm/subdev/clk/mcp77.o
nvkm-y += nvkm/subdev/clk/gf100.o
nvkm-y += nvkm/subdev/clk/gk104.o
nvkm-y += nvkm/subdev/clk/gk20a.o
nvkm-y += nvkm/subdev/clk/pllnv04.o
nvkm-y += nvkm/subdev/clk/pllnva3.o
nvkm-y += nvkm/subdev/clk/pllgt215.o
......@@ -21,27 +21,25 @@
*
* Authors: Ben Skeggs
*/
#include <core/option.h>
#include <subdev/clk.h>
#include <subdev/therm.h>
#include <subdev/volt.h>
#include <subdev/fb.h>
#include <subdev/bios.h>
#include <subdev/bios/boost.h>
#include <subdev/bios/cstep.h>
#include <subdev/bios/perf.h>
#include <subdev/fb.h>
#include <subdev/therm.h>
#include <subdev/volt.h>
#include <core/option.h>
/******************************************************************************
* misc
*****************************************************************************/
static u32
nouveau_clk_adjust(struct nouveau_clk *clk, bool adjust,
u8 pstate, u8 domain, u32 input)
nvkm_clk_adjust(struct nvkm_clk *clk, bool adjust,
u8 pstate, u8 domain, u32 input)
{
struct nouveau_bios *bios = nouveau_bios(clk);
struct nvkm_bios *bios = nvkm_bios(clk);
struct nvbios_boostE boostE;
u8 ver, hdr, cnt, len;
u16 data;
......@@ -76,12 +74,11 @@ nouveau_clk_adjust(struct nouveau_clk *clk, bool adjust,
* C-States
*****************************************************************************/
static int
nouveau_cstate_prog(struct nouveau_clk *clk,
struct nouveau_pstate *pstate, int cstatei)
nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)
{
struct nouveau_therm *ptherm = nouveau_therm(clk);
struct nouveau_volt *volt = nouveau_volt(clk);
struct nouveau_cstate *cstate;
struct nvkm_therm *ptherm = nvkm_therm(clk);
struct nvkm_volt *volt = nvkm_volt(clk);
struct nvkm_cstate *cstate;
int ret;
if (!list_empty(&pstate->list)) {
......@@ -91,7 +88,7 @@ nouveau_cstate_prog(struct nouveau_clk *clk,
}
if (ptherm) {
ret = nouveau_therm_cstate(ptherm, pstate->fanspeed, +1);
ret = nvkm_therm_cstate(ptherm, pstate->fanspeed, +1);
if (ret && ret != -ENODEV) {
nv_error(clk, "failed to raise fan speed: %d\n", ret);
return ret;
......@@ -119,7 +116,7 @@ nouveau_cstate_prog(struct nouveau_clk *clk,
}
if (ptherm) {
ret = nouveau_therm_cstate(ptherm, pstate->fanspeed, -1);
ret = nvkm_therm_cstate(ptherm, pstate->fanspeed, -1);
if (ret && ret != -ENODEV)
nv_error(clk, "failed to lower fan speed: %d\n", ret);
}
......@@ -128,19 +125,18 @@ nouveau_cstate_prog(struct nouveau_clk *clk,
}
static void
nouveau_cstate_del(struct nouveau_cstate *cstate)
nvkm_cstate_del(struct nvkm_cstate *cstate)
{
list_del(&cstate->head);
kfree(cstate);
}
static int
nouveau_cstate_new(struct nouveau_clk *clk, int idx,
struct nouveau_pstate *pstate)
nvkm_cstate_new(struct nvkm_clk *clk, int idx, struct nvkm_pstate *pstate)