Commit a39251ee authored by Ryder Lee's avatar Ryder Lee Committed by Matthias Brugger
Browse files

arm64: dts: mt7622: add SATA device nodes



This patch adds SATA support fot MT7622.
Signed-off-by: default avatarRyder Lee <ryder.lee@mediatek.com>
Signed-off-by: default avatarSean Wang <sean.wang@mediatek.com>
Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 26907b53
......@@ -323,6 +323,14 @@
status = "okay";
};
&sata {
status = "okay";
};
&sata_phy {
status = "okay";
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spic0_pins>;
......
......@@ -9,6 +9,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/mt7622-clk.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/power/mt7622-power.h>
#include <dt-bindings/reset/mt7622-reset.h>
#include <dt-bindings/thermal/thermal.h>
......@@ -616,6 +617,45 @@
};
};
sata: sata@1a200000 {
compatible = "mediatek,mt7622-ahci",
"mediatek,mtk-ahci";
reg = <0 0x1a200000 0 0x1100>;
interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hostc";
clocks = <&pciesys CLK_SATA_AHB_EN>,
<&pciesys CLK_SATA_AXI_EN>,
<&pciesys CLK_SATA_ASIC_EN>,
<&pciesys CLK_SATA_RBC_EN>,
<&pciesys CLK_SATA_PM_EN>;
clock-names = "ahb", "axi", "asic", "rbc", "pm";
phys = <&sata_port PHY_TYPE_SATA>;
phy-names = "sata-phy";
ports-implemented = <0x1>;
power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>;
resets = <&pciesys MT7622_SATA_AXI_BUS_RST>,
<&pciesys MT7622_SATA_PHY_SW_RST>,
<&pciesys MT7622_SATA_PHY_REG_RST>;
reset-names = "axi", "sw", "reg";
mediatek,phy-mode = <&pciesys>;
status = "disabled";
};
sata_phy: sata-phy@1a243000 {
compatible = "mediatek,generic-tphy-v1";
#address-cells = <2>;
#size-cells = <2>;
ranges;
status = "disabled";
sata_port: sata-phy@1a243000 {
reg = <0 0x1a243000 0 0x0100>;
clocks = <&topckgen CLK_TOP_ETH_500M>;
clock-names = "ref";
#phy-cells = <1>;
};
};
ethsys: syscon@1b000000 {
compatible = "mediatek,mt7622-ethsys",
"syscon";
......
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