Commit ae681d96 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: If the GPU hangs twice within 5 seconds, declare it wedged.



The issue is that we may become stuck executing a long running shader
and continually attempt to reset the GPU. (Or maybe we tickle some bug
and need to break the vicious cycle.) So if we are detect a second hang
within 5 seconds, give up trying to programme the GPU and report it
wedged.
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 2fa772f3
......@@ -383,6 +383,11 @@ static int i965_do_reset(struct drm_device *dev, u8 flags)
{
u8 gdrst;
/*
* Set the domains we want to reset (GRDOM/bits 2 and 3) as
* well as the reset bit (GR/bit 0). Setting the GR bit
* triggers the reset; when done, the hardware will clear it.
*/
pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
pci_write_config_byte(dev->pdev, I965_GDRST, gdrst | flags | 0x1);
......@@ -427,13 +432,10 @@ int i915_reset(struct drm_device *dev, u8 flags)
i915_gem_reset(dev);
/*
* Set the domains we want to reset (GRDOM/bits 2 and 3) as
* well as the reset bit (GR/bit 0). Setting the GR bit
* triggers the reset; when done, the hardware will clear it.
*/
ret = -ENODEV;
switch (INTEL_INFO(dev)->gen) {
if (get_seconds() - dev_priv->last_gpu_reset < 5) {
DRM_ERROR("GPU hanging too fast, declaring wedged!\n");
} else switch (INTEL_INFO(dev)->gen) {
case 5:
ret = ironlake_do_reset(dev, flags);
break;
......@@ -444,6 +446,7 @@ int i915_reset(struct drm_device *dev, u8 flags)
ret = i8xx_do_reset(dev, flags);
break;
}
dev_priv->last_gpu_reset = get_seconds();
if (ret) {
DRM_ERROR("Failed to reset chip.\n");
mutex_unlock(&dev->struct_mutex);
......
......@@ -699,6 +699,8 @@ typedef struct drm_i915_private {
struct drm_mm_node *compressed_fb;
struct drm_mm_node *compressed_llb;
unsigned long last_gpu_reset;
/* list of fbdev register on this device */
struct intel_fbdev *fbdev;
} drm_i915_private_t;
......
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