Commit be83cd4e authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau: finalise nvkm namespace switch (no binary change)



The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 9719047b
......@@ -112,12 +112,12 @@ static void nv_crtc_calc_state_ext(struct drm_crtc *crtc, struct drm_display_mod
{
struct drm_device *dev = crtc->dev;
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_bios *bios = nvxx_bios(&drm->device);
struct nouveau_clk *clk = nvxx_clk(&drm->device);
struct nvkm_bios *bios = nvxx_bios(&drm->device);
struct nvkm_clk *clk = nvxx_clk(&drm->device);
struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
struct nv04_mode_state *state = &nv04_display(dev)->mode_reg;
struct nv04_crtc_reg *regp = &state->crtc_reg[nv_crtc->index];
struct nouveau_pll_vals *pv = &regp->pllvals;
struct nvkm_pll_vals *pv = &regp->pllvals;
struct nvbios_pll pll_lim;
if (nvbios_pll_parse(bios, nv_crtc->index ? PLL_VPLL1 : PLL_VPLL0,
......
......@@ -66,7 +66,7 @@ int nv04_dac_output_offset(struct drm_encoder *encoder)
static int sample_load_twice(struct drm_device *dev, bool sense[2])
{
struct nvif_device *device = &nouveau_drm(dev)->device;
struct nouveau_timer *ptimer = nvxx_timer(device);
struct nvkm_timer *ptimer = nvxx_timer(device);
int i;
for (i = 0; i < 2; i++) {
......@@ -80,17 +80,17 @@ static int sample_load_twice(struct drm_device *dev, bool sense[2])
* use a 10ms timeout (guards against crtc being inactive, in
* which case blank state would never change)
*/
if (!nouveau_timer_wait_eq(ptimer, 10000000,
NV_PRMCIO_INP0__COLOR,
0x00000001, 0x00000000))
if (!nvkm_timer_wait_eq(ptimer, 10000000,
NV_PRMCIO_INP0__COLOR,
0x00000001, 0x00000000))
return -EBUSY;
if (!nouveau_timer_wait_eq(ptimer, 10000000,
NV_PRMCIO_INP0__COLOR,
0x00000001, 0x00000001))
if (!nvkm_timer_wait_eq(ptimer, 10000000,
NV_PRMCIO_INP0__COLOR,
0x00000001, 0x00000001))
return -EBUSY;
if (!nouveau_timer_wait_eq(ptimer, 10000000,
NV_PRMCIO_INP0__COLOR,
0x00000001, 0x00000000))
if (!nvkm_timer_wait_eq(ptimer, 10000000,
NV_PRMCIO_INP0__COLOR,
0x00000001, 0x00000000))
return -EBUSY;
udelay(100);
......@@ -232,7 +232,7 @@ uint32_t nv17_dac_sample_load(struct drm_encoder *encoder)
struct drm_device *dev = encoder->dev;
struct nouveau_drm *drm = nouveau_drm(dev);
struct nvif_device *device = &nouveau_drm(dev)->device;
struct nouveau_gpio *gpio = nvxx_gpio(device);
struct nvkm_gpio *gpio = nvxx_gpio(device);
struct dcb_output *dcb = nouveau_encoder(encoder)->dcb;
uint32_t sample, testval, regoffset = nv04_dac_output_offset(encoder);
uint32_t saved_powerctrl_2 = 0, saved_powerctrl_4 = 0, saved_routput,
......
......@@ -623,9 +623,9 @@ static void nv04_tmds_slave_init(struct drm_encoder *encoder)
struct drm_device *dev = encoder->dev;
struct dcb_output *dcb = nouveau_encoder(encoder)->dcb;
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_i2c *i2c = nvxx_i2c(&drm->device);
struct nouveau_i2c_port *port = i2c->find(i2c, 2);
struct nouveau_i2c_board_info info[] = {
struct nvkm_i2c *i2c = nvxx_i2c(&drm->device);
struct nvkm_i2c_port *port = i2c->find(i2c, 2);
struct nvkm_i2c_board_info info[] = {
{
{
.type = "sil164",
......
......@@ -35,7 +35,7 @@ int
nv04_display_create(struct drm_device *dev)
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_i2c *i2c = nvxx_i2c(&drm->device);
struct nvkm_i2c *i2c = nvxx_i2c(&drm->device);
struct dcb_table *dcb = &drm->vbios.dcb;
struct drm_connector *connector, *ct;
struct drm_encoder *encoder;
......
......@@ -36,7 +36,7 @@ struct nv04_crtc_reg {
/* PRAMDAC regs */
uint32_t nv10_cursync;
struct nouveau_pll_vals pllvals;
struct nvkm_pll_vals pllvals;
uint32_t ramdac_gen_ctrl;
uint32_t ramdac_630;
uint32_t ramdac_634;
......@@ -170,7 +170,7 @@ nouveau_bios_run_init_table(struct drm_device *dev, u16 table,
struct dcb_output *outp, int crtc)
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_bios *bios = nvxx_bios(&drm->device);
struct nvkm_bios *bios = nvxx_bios(&drm->device);
struct nvbios_init init = {
.subdev = nv_subdev(bios),
.bios = bios,
......
......@@ -130,7 +130,7 @@ NVBlankScreen(struct drm_device *dev, int head, bool blank)
static void
nouveau_hw_decode_pll(struct drm_device *dev, uint32_t reg1, uint32_t pll1,
uint32_t pll2, struct nouveau_pll_vals *pllvals)
uint32_t pll2, struct nvkm_pll_vals *pllvals)
{
struct nouveau_drm *drm = nouveau_drm(dev);
......@@ -162,11 +162,11 @@ nouveau_hw_decode_pll(struct drm_device *dev, uint32_t reg1, uint32_t pll1,
int
nouveau_hw_get_pllvals(struct drm_device *dev, enum nvbios_pll_type plltype,
struct nouveau_pll_vals *pllvals)
struct nvkm_pll_vals *pllvals)
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nvif_device *device = &drm->device;
struct nouveau_bios *bios = nvxx_bios(device);
struct nvkm_bios *bios = nvxx_bios(device);
uint32_t reg1, pll1, pll2 = 0;
struct nvbios_pll pll_lim;
int ret;
......@@ -202,7 +202,7 @@ nouveau_hw_get_pllvals(struct drm_device *dev, enum nvbios_pll_type plltype,
}
int
nouveau_hw_pllvals_to_clk(struct nouveau_pll_vals *pv)
nouveau_hw_pllvals_to_clk(struct nvkm_pll_vals *pv)
{
/* Avoid divide by zero if called at an inappropriate time */
if (!pv->M1 || !pv->M2)
......@@ -214,7 +214,7 @@ nouveau_hw_pllvals_to_clk(struct nouveau_pll_vals *pv)
int
nouveau_hw_get_clock(struct drm_device *dev, enum nvbios_pll_type plltype)
{
struct nouveau_pll_vals pllvals;
struct nvkm_pll_vals pllvals;
int ret;
if (plltype == PLL_MEMORY &&
......@@ -253,10 +253,10 @@ nouveau_hw_fix_bad_vpll(struct drm_device *dev, int head)
struct nouveau_drm *drm = nouveau_drm(dev);
struct nvif_device *device = &drm->device;
struct nouveau_clk *clk = nvxx_clk(device);
struct nouveau_bios *bios = nvxx_bios(device);
struct nvkm_clk *clk = nvxx_clk(device);
struct nvkm_bios *bios = nvxx_bios(device);
struct nvbios_pll pll_lim;
struct nouveau_pll_vals pv;
struct nvkm_pll_vals pv;
enum nvbios_pll_type pll = head ? PLL_VPLL1 : PLL_VPLL0;
if (nvbios_pll_parse(bios, pll, &pll_lim))
......@@ -463,7 +463,7 @@ nv_load_state_ramdac(struct drm_device *dev, int head,
struct nv04_mode_state *state)
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_clk *clk = nvxx_clk(&drm->device);
struct nvkm_clk *clk = nvxx_clk(&drm->device);
struct nv04_crtc_reg *regp = &state->crtc_reg[head];
uint32_t pllreg = head ? NV_RAMDAC_VPLL2 : NV_PRAMDAC_VPLL_COEFF;
int i;
......@@ -661,7 +661,7 @@ nv_load_state_ext(struct drm_device *dev, int head,
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nvif_device *device = &drm->device;
struct nouveau_timer *ptimer = nvxx_timer(device);
struct nvkm_timer *ptimer = nvxx_timer(device);
struct nv04_crtc_reg *regp = &state->crtc_reg[head];
uint32_t reg900;
int i;
......@@ -741,8 +741,8 @@ nv_load_state_ext(struct drm_device *dev, int head,
if (drm->device.info.family < NV_DEVICE_INFO_V0_KELVIN) {
/* Not waiting for vertical retrace before modifying
CRE_53/CRE_54 causes lockups. */
nouveau_timer_wait_eq(ptimer, 650000000, NV_PRMCIO_INP0__COLOR, 0x8, 0x8);
nouveau_timer_wait_eq(ptimer, 650000000, NV_PRMCIO_INP0__COLOR, 0x8, 0x0);
nvkm_timer_wait_eq(ptimer, 650000000, NV_PRMCIO_INP0__COLOR, 0x8, 0x8);
nvkm_timer_wait_eq(ptimer, 650000000, NV_PRMCIO_INP0__COLOR, 0x8, 0x0);
}
wr_cio_state(dev, head, regp, NV_CIO_CRE_42);
......
......@@ -42,8 +42,8 @@ uint8_t NVReadVgaGr(struct drm_device *, int head, uint8_t index);
void NVSetOwner(struct drm_device *, int owner);
void NVBlankScreen(struct drm_device *, int head, bool blank);
int nouveau_hw_get_pllvals(struct drm_device *, enum nvbios_pll_type plltype,
struct nouveau_pll_vals *pllvals);
int nouveau_hw_pllvals_to_clk(struct nouveau_pll_vals *pllvals);
struct nvkm_pll_vals *pllvals);
int nouveau_hw_pllvals_to_clk(struct nvkm_pll_vals *pllvals);
int nouveau_hw_get_clock(struct drm_device *, enum nvbios_pll_type plltype);
void nouveau_hw_save_vga_fonts(struct drm_device *, bool save);
void nouveau_hw_save_state(struct drm_device *, int head,
......
......@@ -35,7 +35,7 @@
#include <drm/i2c/ch7006.h>
static struct nouveau_i2c_board_info nv04_tv_encoder_info[] = {
static struct nvkm_i2c_board_info nv04_tv_encoder_info[] = {
{
{
I2C_BOARD_INFO("ch7006", 0x75),
......@@ -54,7 +54,7 @@ static struct nouveau_i2c_board_info nv04_tv_encoder_info[] = {
int nv04_tv_identify(struct drm_device *dev, int i2c_index)
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_i2c *i2c = nvxx_i2c(&drm->device);
struct nvkm_i2c *i2c = nvxx_i2c(&drm->device);
return i2c->identify(i2c, i2c_index, "TV encoder",
nv04_tv_encoder_info, NULL, NULL);
......@@ -204,8 +204,8 @@ nv04_tv_create(struct drm_connector *connector, struct dcb_output *entry)
struct drm_encoder *encoder;
struct drm_device *dev = connector->dev;
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_i2c *i2c = nvxx_i2c(&drm->device);
struct nouveau_i2c_port *port = i2c->find(i2c, entry->i2c_index);
struct nvkm_i2c *i2c = nvxx_i2c(&drm->device);
struct nvkm_i2c_port *port = i2c->find(i2c, entry->i2c_index);
int type, ret;
/* Ensure that we can talk to this encoder */
......
......@@ -46,7 +46,7 @@ static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder)
{
struct drm_device *dev = encoder->dev;
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_gpio *gpio = nvxx_gpio(&drm->device);
struct nvkm_gpio *gpio = nvxx_gpio(&drm->device);
uint32_t testval, regoffset = nv04_dac_output_offset(encoder);
uint32_t gpio0, gpio1, fp_htotal, fp_hsync_start, fp_hsync_end,
fp_control, test_ctrl, dacclk, ctv_14, ctv_1c, ctv_6c;
......@@ -370,7 +370,7 @@ static void nv17_tv_dpms(struct drm_encoder *encoder, int mode)
{
struct drm_device *dev = encoder->dev;
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_gpio *gpio = nvxx_gpio(&drm->device);
struct nvkm_gpio *gpio = nvxx_gpio(&drm->device);
struct nv17_tv_state *regs = &to_tv_enc(encoder)->state;
struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
......
......@@ -33,7 +33,7 @@ int nvif_client_resume(struct nvif_client *);
#include <core/client.h>
#define nvxx_client(a) ({ \
struct nvif_client *_client = nvif_client(nvif_object(a)); \
nouveau_client(_client->base.priv); \
nvkm_client(_client->base.priv); \
})
#endif
......@@ -38,24 +38,24 @@ void nvif_device_ref(struct nvif_device *, struct nvif_device **);
#include <subdev/therm.h>
#define nvxx_device(a) nv_device(nvxx_object((a)))
#define nvxx_bios(a) nouveau_bios(nvxx_device(a))
#define nvxx_fb(a) nouveau_fb(nvxx_device(a))
#define nvxx_mmu(a) nouveau_mmu(nvxx_device(a))
#define nvxx_bar(a) nouveau_bar(nvxx_device(a))
#define nvxx_gpio(a) nouveau_gpio(nvxx_device(a))
#define nvxx_clk(a) nouveau_clk(nvxx_device(a))
#define nvxx_i2c(a) nouveau_i2c(nvxx_device(a))
#define nvxx_timer(a) nouveau_timer(nvxx_device(a))
#define nvxx_bios(a) nvkm_bios(nvxx_device(a))
#define nvxx_fb(a) nvkm_fb(nvxx_device(a))
#define nvxx_mmu(a) nvkm_mmu(nvxx_device(a))
#define nvxx_bar(a) nvkm_bar(nvxx_device(a))
#define nvxx_gpio(a) nvkm_gpio(nvxx_device(a))
#define nvxx_clk(a) nvkm_clk(nvxx_device(a))
#define nvxx_i2c(a) nvkm_i2c(nvxx_device(a))
#define nvxx_timer(a) nvkm_timer(nvxx_device(a))
#define nvxx_wait(a,b,c,d) nv_wait(nvxx_timer(a), (b), (c), (d))
#define nvxx_wait_cb(a,b,c) nv_wait_cb(nvxx_timer(a), (b), (c))
#define nvxx_therm(a) nouveau_therm(nvxx_device(a))
#define nvxx_therm(a) nvkm_therm(nvxx_device(a))
#include <core/device.h>
#include <engine/fifo.h>
#include <engine/gr.h>
#include <engine/sw.h>
#define nvxx_fifo(a) nouveau_fifo(nvxx_device(a))
#define nvxx_fifo_chan(a) ((struct nouveau_fifo_chan *)nvxx_object(a))
#define nvxx_gr(a) ((struct nouveau_gr *)nouveau_engine(nvxx_object(a), NVDEV_ENGINE_GR))
#define nvxx_fifo(a) nvkm_fifo(nvxx_device(a))
#define nvxx_fifo_chan(a) ((struct nvkm_fifo_chan *)nvxx_object(a))
#define nvxx_gr(a) ((struct nvkm_gr *)nvkm_engine(nvxx_object(a), NVDEV_ENGINE_GR))
#endif
......@@ -70,6 +70,6 @@ void nvif_object_unmap(struct nvif_object *);
/*XXX*/
#include <core/object.h>
#define nvxx_object(a) ((struct nouveau_object *)nvif_object(a)->priv)
#define nvxx_object(a) ((struct nvkm_object *)nvif_object(a)->priv)
#endif
#ifndef __NVKM_OS_H__
#define __NVKM_OS_H__
#include <nvif/os.h>
#define nouveau_client nvkm_client
#define nouveau_client_name nvkm_client_name
#define nouveau_client_create nvkm_client_create
#define nouveau_client_init nvkm_client_init
#define nouveau_client_fini nvkm_client_fini
#define nouveau_engctx nvkm_engctx
#define nouveau_engctx_create nvkm_engctx_create
#define nouveau_engctx_create_ nvkm_engctx_create_
#define nouveau_engctx_destroy nvkm_engctx_destroy
#define nouveau_engctx_init nvkm_engctx_init
#define nouveau_engctx_fini nvkm_engctx_fini
#define _nouveau_engctx_ctor _nvkm_engctx_ctor
#define _nouveau_engctx_dtor _nvkm_engctx_dtor
#define _nouveau_engctx_init _nvkm_engctx_init
#define _nouveau_engctx_fini _nvkm_engctx_fini
#define _nouveau_engctx_rd32 _nvkm_engctx_rd32
#define _nouveau_engctx_wr32 _nvkm_engctx_wr32
#define nouveau_engctx_get nvkm_engctx_get
#define nouveau_engctx_put nvkm_engctx_put
#define nouveau_engine nvkm_engine
#define nouveau_engine_create nvkm_engine_create
#define nouveau_engine_create_ nvkm_engine_create_
#define nouveau_engine_destroy nvkm_engine_destroy
#define nouveau_engine_init nvkm_engine_init
#define nouveau_engine_fini nvkm_engine_fini
#define _nouveau_engine_ctor _nvkm_engine_ctor
#define _nouveau_engine_dtor _nvkm_engine_dtor
#define _nouveau_engine_init _nvkm_engine_init
#define _nouveau_engine_fini _nvkm_engine_fini
#define nouveau_enum nvkm_enum
#define nouveau_gpuobj nvkm_gpuobj
#define nouveau_gpuobj_create nvkm_gpuobj_create
#define nouveau_gpuobj_destroy nvkm_gpuobj_destroy
#define _nouveau_gpuobj_ctor _nvkm_gpuobj_ctor
#define _nouveau_gpuobj_dtor _nvkm_gpuobj_dtor
#define _nouveau_gpuobj_init _nvkm_gpuobj_init
#define _nouveau_gpuobj_fini _nvkm_gpuobj_fini
#define _nouveau_gpuobj_rd32 _nvkm_gpuobj_rd32
#define _nouveau_gpuobj_wr32 _nvkm_gpuobj_wr32
#define nouveau_gpuobj_new nvkm_gpuobj_new
#define nouveau_gpuobj_dup nvkm_gpuobj_dup
#define nouveau_gpuobj_ref nvkm_gpuobj_ref
#define nouveau_gpuobj_map nvkm_gpuobj_map
#define nouveau_gpuobj_map_vm nvkm_gpuobj_map_vm
#define nouveau_gpuobj_unmap nvkm_gpuobj_unmap
#define nouveau_handle nvkm_handle
#define nouveau_handle_ref nvkm_handle_ref
#define nouveau_handle_put nvkm_handle_put
#define nouveau_handle_get_class nvkm_handle_get_class
#define nouveau_handle_get_vinst nvkm_handle_get_vinst
#define nouveau_handle_get_cinst nvkm_handle_get_cinst
#define nouveau_mm nvkm_mm
#define nouveau_mm_node nvkm_mm_node
#define nouveau_mm_init nvkm_mm_init
#define nouveau_mm_fini nvkm_mm_fini
#define nouveau_mm_head nvkm_mm_head
#define nouveau_mm_tail nvkm_mm_tail
#define nouveau_mm_free nvkm_mm_free
#define nouveau_mm_initialised nvkm_mm_initialised
#define nouveau_namedb nvkm_namedb
#define nouveau_namedb_create nvkm_namedb_create
#define nouveau_namedb_create_ nvkm_namedb_create_
#define nouveau_namedb_destroy nvkm_namedb_destroy
#define nouveau_namedb_init nvkm_namedb_init
#define nouveau_namedb_fini nvkm_namedb_fini
#define _nouveau_namedb_ctor _nvkm_namedb_ctor
#define _nouveau_namedb_dtor _nvkm_namedb_dtor
#define _nouveau_namedb_init _nvkm_namedb_init
#define _nouveau_namedb_fini _nvkm_namedb_fini
#define nouveau_namedb_ref nvkm_namedb_ref
#define nouveau_namedb_put nvkm_namedb_put
#define nouveau_namedb_get nvkm_namedb_get
#define nouveau_namedb_get_class nvkm_namedb_get_class
#define nouveau_namedb_get_vinst nvkm_namedb_get_vinst
#define nouveau_namedb_get_cinst nvkm_namedb_get_cinst
#define nouveau_object_debug nvkm_object_debug
#define nouveau_object nvkm_object
#define nouveau_object_create nvkm_object_create
#define nouveau_object_create_ nvkm_object_create_
#define nouveau_object_destroy nvkm_object_destroy
#define nouveau_object_init nvkm_object_init
#define nouveau_object_fini nvkm_object_fini
#define _nouveau_object_ctor _nvkm_object_ctor
#define nouveau_object_ctor nvkm_object_ctor
#define nouveau_object_ref nvkm_object_ref
#define nouveau_object_ofuncs nvkm_object_ofuncs
#define nouveau_object_inc nvkm_object_inc
#define nouveau_object_dec nvkm_object_dec
#define nouveau_ofuncs nvkm_ofuncs
#define nouveau_oclass nvkm_oclass
#define nouveau_omthds nvkm_omthds
#define nouveau_parent nvkm_parent
#define nouveau_parent_create nvkm_parent_create
#define nouveau_parent_create_ nvkm_parent_create_
#define nouveau_parent_destroy nvkm_parent_destroy
#define nouveau_parent_init nvkm_parent_init
#define nouveau_parent_fini nvkm_parent_fini
#define _nouveau_parent_ctor _nvkm_parent_ctor
#define _nouveau_parent_dtor _nvkm_parent_dtor
#define _nouveau_parent_init _nvkm_parent_init
#define _nouveau_parent_fini _nvkm_parent_fini
#define nouveau_printk nvkm_printk
#define nouveau_ramht nvkm_ramht
#define nouveau_ramht_new nvkm_ramht_new
#define nouveau_ramht_ref nvkm_ramht_ref
#define nouveau_ramht_insert nvkm_ramht_insert
#define nouveau_ramht_remove nvkm_ramht_remove
#define nouveau_subdev nvkm_subdev
#define nouveau_subdev_create nvkm_subdev_create
#define nouveau_subdev_create_ nvkm_subdev_create_
#define nouveau_subdev_destroy nvkm_subdev_destroy
#define nouveau_subdev_init nvkm_subdev_init
#define nouveau_subdev_fini nvkm_subdev_fini
#define _nouveau_subdev_ctor _nvkm_subdev_ctor
#define _nouveau_subdev_dtor _nvkm_subdev_dtor
#define _nouveau_subdev_init _nvkm_subdev_init
#define _nouveau_subdev_fini _nvkm_subdev_fini
#define nouveau_subdev_reset nvkm_subdev_reset
#define nouveau_bitfield nvkm_bitfield
#define nouveau_bitfield_print nvkm_bitfield_print
#define nouveau_enum nvkm_enum
#define nouveau_enum_find nvkm_enum_find
#define nouveau_enum_print nvkm_enum_print
#define nouveau_stropt nvkm_stropt
#define nouveau_boolopt nvkm_boolopt
#define nouveau_dbgopt nvkm_dbgopt
#define nouveau_device nvkm_device
#define nouveau_device_find nvkm_device_find
#define nouveau_device_list nvkm_device_list
#define nouveau_vma nvkm_vma
#define nouveau_vm nvkm_vm
#define nouveau_vm_get nvkm_vm_get
#define nouveau_vm_put nvkm_vm_put
#define nouveau_vm_map nvkm_vm_map
#define nouveau_vm_unmap nvkm_vm_unmap
#define nouveau_vm_new nvkm_vm_new
#define nouveau_vm_ref nvkm_vm_ref
#define nouveau_instmem nvkm_instmem
#define nouveau_instobj nvkm_instobj
#define nouveau_mem nvkm_mem
#define nouveau_bar nvkm_bar
#define nouveau_falcon nvkm_falcon
#define nouveau_falcon_create nvkm_falcon_create
#define nouveau_falcon_create_ nvkm_falcon_create_
#define nouveau_falcon_destroy nvkm_falcon_destroy
#define nouveau_falcon_init nvkm_falcon_init
#define nouveau_falcon_fini nvkm_falcon_fini
#define _nouveau_falcon_ctor _nvkm_falcon_ctor
#define _nouveau_falcon_dtor _nvkm_falcon_dtor
#define _nouveau_falcon_init _nvkm_falcon_init
#define _nouveau_falcon_fini _nvkm_falcon_fini
#define _nouveau_falcon_rd32 _nvkm_falcon_rd32
#define _nouveau_falcon_wr32 _nvkm_falcon_wr32
#define nouveau_falcon_context nvkm_falcon_context
#define nouveau_falcon_context_create nvkm_falcon_context_create
#define nouveau_falcon_context_create_ nvkm_falcon_context_create_
#define nouveau_falcon_context_destroy nvkm_falcon_context_destroy
#define nouveau_falcon_context_init nvkm_falcon_context_init
#define nouveau_falcon_context_fini nvkm_falcon_context_fini
#define _nouveau_falcon_context_ctor _nvkm_falcon_context_ctor
#define _nouveau_falcon_context_dtor _nvkm_falcon_context_dtor
#define _nouveau_falcon_context_init _nvkm_falcon_context_init
#define _nouveau_falcon_context_fini _nvkm_falcon_context_fini
#define _nouveau_falcon_context_rd32 _nvkm_falcon_context_rd32
#define _nouveau_falcon_context_wr32 _nvkm_falcon_context_wr32
#define nouveau_falcon_intr nvkm_falcon_intr
#define nouveau_xtensa nvkm_xtensa
#define nouveau_xtensa_create nvkm_xtensa_create
#define nouveau_xtensa_create_ nvkm_xtensa_create_
#define nouveau_xtensa_destroy nvkm_xtensa_destroy
#define nouveau_xtensa_init nvkm_xtensa_init
#define nouveau_xtensa_fini nvkm_xtensa_fini
#define _nouveau_xtensa_ctor _nvkm_xtensa_ctor
#define _nouveau_xtensa_dtor _nvkm_xtensa_dtor
#define _nouveau_xtensa_init _nvkm_xtensa_init
#define _nouveau_xtensa_fini _nvkm_xtensa_fini
#define _nouveau_xtensa_rd32 _nvkm_xtensa_rd32
#define _nouveau_xtensa_wr32 _nvkm_xtensa_wr32
#define nouveau_xtensa_context nvkm_xtensa_context
#define nouveau_xtensa_context_create nvkm_xtensa_context_create
#define nouveau_xtensa_context_create_ nvkm_xtensa_context_create_
#define nouveau_xtensa_context_destroy nvkm_xtensa_context_destroy
#define nouveau_xtensa_context_init nvkm_xtensa_context_init
#define nouveau_xtensa_context_fini nvkm_xtensa_context_fini
#define _nouveau_xtensa_engctx_ctor _nvkm_xtensa_engctx_ctor
#define _nouveau_xtensa_context_dtor _nvkm_xtensa_context_dtor
#define _nouveau_xtensa_context_init _nvkm_xtensa_context_init
#define _nouveau_xtensa_context_fini _nvkm_xtensa_context_fini
#define _nouveau_xtensa_context_rd32 _nvkm_xtensa_context_rd32
#define _nouveau_xtensa_context_wr32 _nvkm_xtensa_context_wr32
#define nouveau_xtensa_intr nvkm_xtensa_intr
#define nouveau_gpio nvkm_gpio
#define nouveau_i2c nvkm_i2c
#define nouveau_i2c_port nvkm_i2c_port
#define nouveau_i2c_board_info nvkm_i2c_board_info
#define nouveau_devinit nvkm_devinit
#define nouveau_bios nvkm_bios
#define nouveau_bios_oclass nvkm_bios_oclass
#define nouveau_pll_vals nvkm_pll_vals
#define nouveau_therm_trip_point nvkm_therm_trip_point
#define nouveau_fb nvkm_fb
#define nouveau_fifo nvkm_fifo
#define nouveau_therm nvkm_therm
#define nouveau_therm_cstate nvkm_therm_cstate
#define nouveau_volt nvkm_volt
#define nouveau_timer nvkm_timer
#define nouveau_timer_wait_eq nvkm_timer_wait_eq
#define nouveau_timer_alarm nvkm_timer_alarm
#define nouveau_alarm nvkm_alarm
#define nouveau_timer_alarm_cancel nvkm_timer_alarm_cancel
#define nouveau_alarm_init nvkm_alarm_init
#define nva3_pll_calc gt215_pll_calc
#define nouveau_clk nvkm_clk
#define nouveau_domain nvkm_domain
#define nouveau_cstate nvkm_cstate
#define nouveau_pstate nvkm_pstate
#define nouveau_clk_astate nvkm_clk_astate
#define nouveau_clk_ustate nvkm_clk_ustate
#define nva3_clk_pre gt215_clk_pre
#define nva3_clk_post gt215_clk_post
#define nva3_clk_info gt215_clk_info
#define nva3_pll_info gt215_pll_info
#define nouveau_ibus nvkm_ibus
#define nouveau_memx nvkm_memx
#define nouveau_memx_block nvkm_memx_block
#define nouveau_memx_unblock nvkm_memx_unblock
#define nouveau_memx_train nvkm_memx_train
#define nouveau_memx_train_result nvkm_memx_train_result
#define nouveau_memx_wait_vblank nvkm_memx_wait_vblank
#define nouveau_memx_rd32 nvkm_memx_rd32
#define nouveau_memx_wr32 nvkm_memx_wr32
#define nouveau_memx_wait nvkm_memx_wait
#define nouveau_memx_init nvkm_memx_init
#define nouveau_memx_fini nvkm_memx_fini
#define nouveau_memx_nsec nvkm_memx_nsec
#define nouveau_ltc nvkm_ltc
#define nouveau_pmu nvkm_pmu
#define nouveau_fb nvkm_fb
#define nouveau_fb_tile nvkm_fb_tile
#define nvc0_pte_storage_type_map gf100_pte_storage_type_map
#define nouveau_fuse nvkm_fuse
#define nouveau_mc nvkm_mc
#define nouveau_mmu nvkm_mmu
#define nouveau_dmaeng nvkm_dmaeng
#define nouveau_dmaobj nvkm_dmaobj
#define nouveau_disp nvkm_disp
#define nouveau_fifo_chan nvkm_fifo_chan
#define nouveau_fifo nvkm_fifo
#define nouveau_gr nvkm_gr
#define nouveau_sw nvkm_sw
#define nouveau_sw_chan nvkm_sw_chan
#define nouveau_device_create nvkm_device_create
#define nouveau_device_create_ nvkm_device_create_
#endif
#ifndef __NOUVEAU_MXM_H__
#define __NOUVEAU_MXM_H__
#ifndef __NVKM_MXM_H__
#define __NVKM_MXM_H__
#include <core/subdev.h>
#include <core/device.h>
#define MXM_SANITISE_DCB 0x00000001
struct nouveau_mxm {
struct nouveau_subdev base;
struct nvkm_mxm {
struct nvkm_subdev base;
u32 action;
u8 *mxms;
};
static inline struct nouveau_mxm *
nouveau_mxm(void *obj)
static inline struct nvkm_mxm *
nvkm_mxm(void *obj)
{
return (void *)nouveau_subdev(obj, NVDEV_SUBDEV_MXM);
return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_MXM);
}
#define nouveau_mxm_create(p,e,o,d) \
nouveau_mxm_create_((p), (e), (o), sizeof(**d), (void **)d)
#define nouveau_mxm_init(p) \
nouveau_subdev_init(&(p)->base)
#define nouveau_mxm_fini(p,s) \
nouveau_subdev_fini(&(p)->base, (s))
int nouveau_mxm_create_(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *, int, void **);
void nouveau_mxm_destroy(struct nouveau_mxm *);
#define _nouveau_mxm_dtor _nouveau_subdev_dtor
#define _nouveau_mxm_init _nouveau_subdev_init
#define _nouveau_mxm_fini _nouveau_subdev_fini
extern struct nouveau_oclass nv50_mxm_oclass;
#define nvkm_mxm_create(p,e,o,d) \
nvkm_mxm_create_((p), (e), (o), sizeof(**d), (void **)d)
#define nvkm_mxm_init(p) \
nvkm_subdev_init(&(p)->base)
#define nvkm_mxm_fini(p,s) \
nvkm_subdev_fini(&(p)->base, (s))
int nvkm_mxm_create_(struct nvkm_object *, struct nvkm_object *,