Commit fe04b112 authored by Committed by Kumar GalaBrowse files
powerpc/e500mc: Implement machine check handler.
Most of the MSCR bit assigments are different in e500mc versus e500, and they are now write-one-to-clear. Some e500mc machine check conditions are made recoverable (as long as they aren't stuck on), most notably L1 instruction cache parity errors. Signed-off-by: Scott Wood <email@example.com> Signed-off-by: Kumar Gala <firstname.lastname@example.org>