time.c 37.9 KB
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/* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $
 * time.c: UltraSparc timer and TOD clock support.
 *
 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
 * Copyright (C) 1998 Eddie C. Dost   (ecd@skynet.be)
 *
 * Based largely on code which is:
 *
 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
 */

#include <linux/errno.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <linux/time.h>
#include <linux/timex.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/mc146818rtc.h>
#include <linux/delay.h>
#include <linux/profile.h>
#include <linux/bcd.h>
#include <linux/jiffies.h>
#include <linux/cpufreq.h>
#include <linux/percpu.h>
#include <linux/profile.h>
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#include <linux/miscdevice.h>
#include <linux/rtc.h>
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#include <linux/kernel_stat.h>
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#include <linux/clockchips.h>
#include <linux/clocksource.h>
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#include <asm/oplib.h>
#include <asm/mostek.h>
#include <asm/timer.h>
#include <asm/irq.h>
#include <asm/io.h>
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#include <asm/prom.h>
#include <asm/of_device.h>
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#include <asm/starfire.h>
#include <asm/smp.h>
#include <asm/sections.h>
#include <asm/cpudata.h>
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#include <asm/uaccess.h>
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#include <asm/prom.h>
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#include <asm/irq_regs.h>
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DEFINE_SPINLOCK(mostek_lock);
DEFINE_SPINLOCK(rtc_lock);
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void __iomem *mstk48t02_regs = NULL;
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#ifdef CONFIG_PCI
unsigned long ds1287_regs = 0UL;
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static void __iomem *bq4802_regs;
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#endif

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static void __iomem *mstk48t08_regs;
static void __iomem *mstk48t59_regs;
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static int set_rtc_mmss(unsigned long);

#define TICK_PRIV_BIT	(1UL << 63)
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#define TICKCMP_IRQ_BIT	(1UL << 63)
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#ifdef CONFIG_SMP
unsigned long profile_pc(struct pt_regs *regs)
{
	unsigned long pc = instruction_pointer(regs);

	if (in_lock_functions(pc))
		return regs->u_regs[UREG_RETPC];
	return pc;
}
EXPORT_SYMBOL(profile_pc);
#endif

static void tick_disable_protection(void)
{
	/* Set things up so user can access tick register for profiling
	 * purposes.  Also workaround BB_ERRATA_1 by doing a dummy
	 * read back of %tick after writing it.
	 */
	__asm__ __volatile__(
	"	ba,pt	%%xcc, 1f\n"
	"	 nop\n"
	"	.align	64\n"
	"1:	rd	%%tick, %%g2\n"
	"	add	%%g2, 6, %%g2\n"
	"	andn	%%g2, %0, %%g2\n"
	"	wrpr	%%g2, 0, %%tick\n"
	"	rdpr	%%tick, %%g0"
	: /* no outputs */
	: "r" (TICK_PRIV_BIT)
	: "g2");
}

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static void tick_disable_irq(void)
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{
	__asm__ __volatile__(
	"	ba,pt	%%xcc, 1f\n"
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	"	 nop\n"
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	"	.align	64\n"
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	"1:	wr	%0, 0x0, %%tick_cmpr\n"
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	"	rd	%%tick_cmpr, %%g0"
	: /* no outputs */
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	: "r" (TICKCMP_IRQ_BIT));
}

static void tick_init_tick(void)
{
	tick_disable_protection();
	tick_disable_irq();
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}

static unsigned long tick_get_tick(void)
{
	unsigned long ret;

	__asm__ __volatile__("rd	%%tick, %0\n\t"
			     "mov	%0, %0"
			     : "=r" (ret));

	return ret & ~TICK_PRIV_BIT;
}

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static int tick_add_compare(unsigned long adj)
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{
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	unsigned long orig_tick, new_tick, new_compare;
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	__asm__ __volatile__("rd	%%tick, %0"
			     : "=r" (orig_tick));
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	orig_tick &= ~TICKCMP_IRQ_BIT;
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	/* Workaround for Spitfire Errata (#54 I think??), I discovered
	 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
	 * number 103640.
	 *
	 * On Blackbird writes to %tick_cmpr can fail, the
	 * workaround seems to be to execute the wr instruction
	 * at the start of an I-cache line, and perform a dummy
	 * read back from %tick_cmpr right after writing to it. -DaveM
	 */
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	__asm__ __volatile__("ba,pt	%%xcc, 1f\n\t"
			     " add	%1, %2, %0\n\t"
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			     ".align	64\n"
			     "1:\n\t"
			     "wr	%0, 0, %%tick_cmpr\n\t"
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			     "rd	%%tick_cmpr, %%g0\n\t"
			     : "=r" (new_compare)
			     : "r" (orig_tick), "r" (adj));

	__asm__ __volatile__("rd	%%tick, %0"
			     : "=r" (new_tick));
	new_tick &= ~TICKCMP_IRQ_BIT;
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	return ((long)(new_tick - (orig_tick+adj))) > 0L;
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}

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static unsigned long tick_add_tick(unsigned long adj)
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{
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	unsigned long new_tick;
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	/* Also need to handle Blackbird bug here too. */
	__asm__ __volatile__("rd	%%tick, %0\n\t"
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			     "add	%0, %1, %0\n\t"
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			     "wrpr	%0, 0, %%tick\n\t"
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			     : "=&r" (new_tick)
			     : "r" (adj));
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	return new_tick;
}

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static struct sparc64_tick_ops tick_operations __read_mostly = {
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	.name		=	"tick",
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	.init_tick	=	tick_init_tick,
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	.disable_irq	=	tick_disable_irq,
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	.get_tick	=	tick_get_tick,
	.add_tick	=	tick_add_tick,
	.add_compare	=	tick_add_compare,
	.softint_mask	=	1UL << 0,
};

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struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;

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static void stick_disable_irq(void)
{
	__asm__ __volatile__(
	"wr	%0, 0x0, %%asr25"
	: /* no outputs */
	: "r" (TICKCMP_IRQ_BIT));
}

static void stick_init_tick(void)
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{
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	/* Writes to the %tick and %stick register are not
	 * allowed on sun4v.  The Hypervisor controls that
	 * bit, per-strand.
	 */
	if (tlb_type != hypervisor) {
		tick_disable_protection();
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		tick_disable_irq();
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		/* Let the user get at STICK too. */
		__asm__ __volatile__(
		"	rd	%%asr24, %%g2\n"
		"	andn	%%g2, %0, %%g2\n"
		"	wr	%%g2, 0, %%asr24"
		: /* no outputs */
		: "r" (TICK_PRIV_BIT)
		: "g1", "g2");
	}
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	stick_disable_irq();
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}

static unsigned long stick_get_tick(void)
{
	unsigned long ret;

	__asm__ __volatile__("rd	%%asr24, %0"
			     : "=r" (ret));

	return ret & ~TICK_PRIV_BIT;
}

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static unsigned long stick_add_tick(unsigned long adj)
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{
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	unsigned long new_tick;
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	__asm__ __volatile__("rd	%%asr24, %0\n\t"
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			     "add	%0, %1, %0\n\t"
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			     "wr	%0, 0, %%asr24\n\t"
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			     : "=&r" (new_tick)
			     : "r" (adj));
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	return new_tick;
}

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static int stick_add_compare(unsigned long adj)
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{
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	unsigned long orig_tick, new_tick;
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	__asm__ __volatile__("rd	%%asr24, %0"
			     : "=r" (orig_tick));
	orig_tick &= ~TICKCMP_IRQ_BIT;

	__asm__ __volatile__("wr	%0, 0, %%asr25"
			     : /* no outputs */
			     : "r" (orig_tick + adj));

	__asm__ __volatile__("rd	%%asr24, %0"
			     : "=r" (new_tick));
	new_tick &= ~TICKCMP_IRQ_BIT;
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	return ((long)(new_tick - (orig_tick+adj))) > 0L;
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}

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static struct sparc64_tick_ops stick_operations __read_mostly = {
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	.name		=	"stick",
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	.init_tick	=	stick_init_tick,
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	.disable_irq	=	stick_disable_irq,
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	.get_tick	=	stick_get_tick,
	.add_tick	=	stick_add_tick,
	.add_compare	=	stick_add_compare,
	.softint_mask	=	1UL << 16,
};

/* On Hummingbird the STICK/STICK_CMPR register is implemented
 * in I/O space.  There are two 64-bit registers each, the
 * first holds the low 32-bits of the value and the second holds
 * the high 32-bits.
 *
 * Since STICK is constantly updating, we have to access it carefully.
 *
 * The sequence we use to read is:
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 * 1) read high
 * 2) read low
 * 3) read high again, if it rolled re-read both low and high again.
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 *
 * Writing STICK safely is also tricky:
 * 1) write low to zero
 * 2) write high
 * 3) write low
 */
#define HBIRD_STICKCMP_ADDR	0x1fe0000f060UL
#define HBIRD_STICK_ADDR	0x1fe0000f070UL

static unsigned long __hbird_read_stick(void)
{
	unsigned long ret, tmp1, tmp2, tmp3;
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	unsigned long addr = HBIRD_STICK_ADDR+8;
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	__asm__ __volatile__("ldxa	[%1] %5, %2\n"
			     "1:\n\t"
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			     "sub	%1, 0x8, %1\n\t"
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			     "ldxa	[%1] %5, %3\n\t"
			     "add	%1, 0x8, %1\n\t"
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			     "ldxa	[%1] %5, %4\n\t"
			     "cmp	%4, %2\n\t"
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			     "bne,a,pn	%%xcc, 1b\n\t"
			     " mov	%4, %2\n\t"
			     "sllx	%4, 32, %4\n\t"
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			     "or	%3, %4, %0\n\t"
			     : "=&r" (ret), "=&r" (addr),
			       "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
			     : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));

	return ret;
}

static void __hbird_write_stick(unsigned long val)
{
	unsigned long low = (val & 0xffffffffUL);
	unsigned long high = (val >> 32UL);
	unsigned long addr = HBIRD_STICK_ADDR;

	__asm__ __volatile__("stxa	%%g0, [%0] %4\n\t"
			     "add	%0, 0x8, %0\n\t"
			     "stxa	%3, [%0] %4\n\t"
			     "sub	%0, 0x8, %0\n\t"
			     "stxa	%2, [%0] %4"
			     : "=&r" (addr)
			     : "0" (addr), "r" (low), "r" (high),
			       "i" (ASI_PHYS_BYPASS_EC_E));
}

static void __hbird_write_compare(unsigned long val)
{
	unsigned long low = (val & 0xffffffffUL);
	unsigned long high = (val >> 32UL);
	unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;

	__asm__ __volatile__("stxa	%3, [%0] %4\n\t"
			     "sub	%0, 0x8, %0\n\t"
			     "stxa	%2, [%0] %4"
			     : "=&r" (addr)
			     : "0" (addr), "r" (low), "r" (high),
			       "i" (ASI_PHYS_BYPASS_EC_E));
}

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static void hbtick_disable_irq(void)
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{
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	__hbird_write_compare(TICKCMP_IRQ_BIT);
}
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static void hbtick_init_tick(void)
{
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	tick_disable_protection();

	/* XXX This seems to be necessary to 'jumpstart' Hummingbird
	 * XXX into actually sending STICK interrupts.  I think because
	 * XXX of how we store %tick_cmpr in head.S this somehow resets the
	 * XXX {TICK + STICK} interrupt mux.  -DaveM
	 */
	__hbird_write_stick(__hbird_read_stick());

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	hbtick_disable_irq();
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}

static unsigned long hbtick_get_tick(void)
{
	return __hbird_read_stick() & ~TICK_PRIV_BIT;
}

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static unsigned long hbtick_add_tick(unsigned long adj)
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{
	unsigned long val;

	val = __hbird_read_stick() + adj;
	__hbird_write_stick(val);

	return val;
}

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static int hbtick_add_compare(unsigned long adj)
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{
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	unsigned long val = __hbird_read_stick();
	unsigned long val2;
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	val &= ~TICKCMP_IRQ_BIT;
	val += adj;
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	__hbird_write_compare(val);

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	val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT;

	return ((long)(val2 - val)) > 0L;
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}

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static struct sparc64_tick_ops hbtick_operations __read_mostly = {
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	.name		=	"hbtick",
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	.init_tick	=	hbtick_init_tick,
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	.disable_irq	=	hbtick_disable_irq,
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	.get_tick	=	hbtick_get_tick,
	.add_tick	=	hbtick_add_tick,
	.add_compare	=	hbtick_add_compare,
	.softint_mask	=	1UL << 0,
};

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static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
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#define TICK_SIZE (tick_nsec / 1000)

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#define USEC_AFTER	500000
#define USEC_BEFORE	500000

static void sync_cmos_clock(unsigned long dummy);

static DEFINE_TIMER(sync_cmos_timer, sync_cmos_clock, 0, 0);

static void sync_cmos_clock(unsigned long dummy)
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{
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	struct timeval now, next;
	int fail = 1;

	/*
	 * If we have an externally synchronized Linux clock, then update
	 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
	 * called as close as possible to 500 ms before the new second starts.
	 * This code is run on a timer.  If the clock is set, that timer
	 * may not expire at the correct time.  Thus, we adjust...
	 */
	if (!ntp_synced())
		/*
		 * Not synced, exit, do not restart a timer (if one is
		 * running, let it run out).
		 */
		return;

	do_gettimeofday(&now);
	if (now.tv_usec >= USEC_AFTER - ((unsigned) TICK_SIZE) / 2 &&
	    now.tv_usec <= USEC_BEFORE + ((unsigned) TICK_SIZE) / 2)
		fail = set_rtc_mmss(now.tv_sec);

	next.tv_usec = USEC_AFTER - now.tv_usec;
	if (next.tv_usec <= 0)
		next.tv_usec += USEC_PER_SEC;

	if (!fail)
		next.tv_sec = 659;
	else
		next.tv_sec = 0;

	if (next.tv_usec >= USEC_PER_SEC) {
		next.tv_sec++;
		next.tv_usec -= USEC_PER_SEC;
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	}
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	mod_timer(&sync_cmos_timer, jiffies + timeval_to_jiffies(&next));
}

void notify_arch_cmos_timer(void)
{
	mod_timer(&sync_cmos_timer, jiffies + 1);
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}

/* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
static void __init kick_start_clock(void)
{
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	void __iomem *regs = mstk48t02_regs;
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	u8 sec, tmp;
	int i, count;

	prom_printf("CLOCK: Clock was stopped. Kick start ");

	spin_lock_irq(&mostek_lock);

	/* Turn on the kick start bit to start the oscillator. */
	tmp = mostek_read(regs + MOSTEK_CREG);
	tmp |= MSTK_CREG_WRITE;
	mostek_write(regs + MOSTEK_CREG, tmp);
	tmp = mostek_read(regs + MOSTEK_SEC);
	tmp &= ~MSTK_STOP;
	mostek_write(regs + MOSTEK_SEC, tmp);
	tmp = mostek_read(regs + MOSTEK_HOUR);
	tmp |= MSTK_KICK_START;
	mostek_write(regs + MOSTEK_HOUR, tmp);
	tmp = mostek_read(regs + MOSTEK_CREG);
	tmp &= ~MSTK_CREG_WRITE;
	mostek_write(regs + MOSTEK_CREG, tmp);

	spin_unlock_irq(&mostek_lock);

	/* Delay to allow the clock oscillator to start. */
	sec = MSTK_REG_SEC(regs);
	for (i = 0; i < 3; i++) {
		while (sec == MSTK_REG_SEC(regs))
			for (count = 0; count < 100000; count++)
				/* nothing */ ;
		prom_printf(".");
		sec = MSTK_REG_SEC(regs);
	}
	prom_printf("\n");

	spin_lock_irq(&mostek_lock);

	/* Turn off kick start and set a "valid" time and date. */
	tmp = mostek_read(regs + MOSTEK_CREG);
	tmp |= MSTK_CREG_WRITE;
	mostek_write(regs + MOSTEK_CREG, tmp);
	tmp = mostek_read(regs + MOSTEK_HOUR);
	tmp &= ~MSTK_KICK_START;
	mostek_write(regs + MOSTEK_HOUR, tmp);
	MSTK_SET_REG_SEC(regs,0);
	MSTK_SET_REG_MIN(regs,0);
	MSTK_SET_REG_HOUR(regs,0);
	MSTK_SET_REG_DOW(regs,5);
	MSTK_SET_REG_DOM(regs,1);
	MSTK_SET_REG_MONTH(regs,8);
	MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
	tmp = mostek_read(regs + MOSTEK_CREG);
	tmp &= ~MSTK_CREG_WRITE;
	mostek_write(regs + MOSTEK_CREG, tmp);

	spin_unlock_irq(&mostek_lock);

	/* Ensure the kick start bit is off. If it isn't, turn it off. */
	while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
		prom_printf("CLOCK: Kick start still on!\n");

		spin_lock_irq(&mostek_lock);

		tmp = mostek_read(regs + MOSTEK_CREG);
		tmp |= MSTK_CREG_WRITE;
		mostek_write(regs + MOSTEK_CREG, tmp);

		tmp = mostek_read(regs + MOSTEK_HOUR);
		tmp &= ~MSTK_KICK_START;
		mostek_write(regs + MOSTEK_HOUR, tmp);

		tmp = mostek_read(regs + MOSTEK_CREG);
		tmp &= ~MSTK_CREG_WRITE;
		mostek_write(regs + MOSTEK_CREG, tmp);

		spin_unlock_irq(&mostek_lock);
	}

	prom_printf("CLOCK: Kick start procedure successful.\n");
}

/* Return nonzero if the clock chip battery is low. */
static int __init has_low_battery(void)
{
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	void __iomem *regs = mstk48t02_regs;
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	u8 data1, data2;

	spin_lock_irq(&mostek_lock);

	data1 = mostek_read(regs + MOSTEK_EEPROM);	/* Read some data. */
	mostek_write(regs + MOSTEK_EEPROM, ~data1);	/* Write back the complement. */
	data2 = mostek_read(regs + MOSTEK_EEPROM);	/* Read back the complement. */
	mostek_write(regs + MOSTEK_EEPROM, data1);	/* Restore original value. */

	spin_unlock_irq(&mostek_lock);

	return (data1 == data2);	/* Was the write blocked? */
}

/* Probe for the real time clock chip. */
static void __init set_system_time(void)
{
	unsigned int year, mon, day, hour, min, sec;
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	void __iomem *mregs = mstk48t02_regs;
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#ifdef CONFIG_PCI
	unsigned long dregs = ds1287_regs;
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	void __iomem *bregs = bq4802_regs;
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#else
	unsigned long dregs = 0UL;
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	void __iomem *bregs = 0UL;
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#endif
	u8 tmp;

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	if (!mregs && !dregs && !bregs) {
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		prom_printf("Something wrong, clock regs not mapped yet.\n");
		prom_halt();
	}		

	if (mregs) {
		spin_lock_irq(&mostek_lock);

		/* Traditional Mostek chip. */
		tmp = mostek_read(mregs + MOSTEK_CREG);
		tmp |= MSTK_CREG_READ;
		mostek_write(mregs + MOSTEK_CREG, tmp);

		sec = MSTK_REG_SEC(mregs);
		min = MSTK_REG_MIN(mregs);
		hour = MSTK_REG_HOUR(mregs);
		day = MSTK_REG_DOM(mregs);
		mon = MSTK_REG_MONTH(mregs);
		year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
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	} else if (bregs) {
		unsigned char val = readb(bregs + 0x0e);
		unsigned int century;

		/* BQ4802 RTC chip. */

		writeb(val | 0x08, bregs + 0x0e);

		sec  = readb(bregs + 0x00);
		min  = readb(bregs + 0x02);
		hour = readb(bregs + 0x04);
		day  = readb(bregs + 0x06);
		mon  = readb(bregs + 0x09);
		year = readb(bregs + 0x0a);
		century = readb(bregs + 0x0f);

		writeb(val, bregs + 0x0e);

		BCD_TO_BIN(sec);
		BCD_TO_BIN(min);
		BCD_TO_BIN(hour);
		BCD_TO_BIN(day);
		BCD_TO_BIN(mon);
		BCD_TO_BIN(year);
		BCD_TO_BIN(century);

		year += (century * 100);
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	} else {
		/* Dallas 12887 RTC chip. */

		do {
			sec  = CMOS_READ(RTC_SECONDS);
			min  = CMOS_READ(RTC_MINUTES);
			hour = CMOS_READ(RTC_HOURS);
			day  = CMOS_READ(RTC_DAY_OF_MONTH);
			mon  = CMOS_READ(RTC_MONTH);
			year = CMOS_READ(RTC_YEAR);
		} while (sec != CMOS_READ(RTC_SECONDS));
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		if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
			BCD_TO_BIN(sec);
			BCD_TO_BIN(min);
			BCD_TO_BIN(hour);
			BCD_TO_BIN(day);
			BCD_TO_BIN(mon);
			BCD_TO_BIN(year);
		}
		if ((year += 1900) < 1970)
			year += 100;
	}

	xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
	xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
	set_normalized_timespec(&wall_to_monotonic,
 	                        -xtime.tv_sec, -xtime.tv_nsec);

	if (mregs) {
		tmp = mostek_read(mregs + MOSTEK_CREG);
		tmp &= ~MSTK_CREG_READ;
		mostek_write(mregs + MOSTEK_CREG, tmp);

		spin_unlock_irq(&mostek_lock);
	}
}

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/* davem suggests we keep this within the 4M locked kernel image */
static u32 starfire_get_time(void)
{
	static char obp_gettod[32];
	static u32 unix_tod;

	sprintf(obp_gettod, "h# %08x unix-gettod",
		(unsigned int) (long) &unix_tod);
	prom_feval(obp_gettod);

	return unix_tod;
}

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static int starfire_set_time(u32 val)
{
	/* Do nothing, time is set using the service processor
	 * console on this platform.
	 */
	return 0;
}

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static u32 hypervisor_get_time(void)
{
	register unsigned long func asm("%o5");
	register unsigned long arg0 asm("%o0");
	register unsigned long arg1 asm("%o1");
	int retries = 10000;

retry:
	func = HV_FAST_TOD_GET;
	arg0 = 0;
	arg1 = 0;
	__asm__ __volatile__("ta	%6"
			     : "=&r" (func), "=&r" (arg0), "=&r" (arg1)
			     : "0" (func), "1" (arg0), "2" (arg1),
			       "i" (HV_FAST_TRAP));
	if (arg0 == HV_EOK)
		return arg1;
	if (arg0 == HV_EWOULDBLOCK) {
		if (--retries > 0) {
			udelay(100);
			goto retry;
		}
		printk(KERN_WARNING "SUN4V: tod_get() timed out.\n");
		return 0;
	}
	printk(KERN_WARNING "SUN4V: tod_get() not supported.\n");
	return 0;
}

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static int hypervisor_set_time(u32 secs)
{
	register unsigned long func asm("%o5");
	register unsigned long arg0 asm("%o0");
	int retries = 10000;

retry:
	func = HV_FAST_TOD_SET;
	arg0 = secs;
	__asm__ __volatile__("ta	%4"
			     : "=&r" (func), "=&r" (arg0)
			     : "0" (func), "1" (arg0),
			       "i" (HV_FAST_TRAP));
	if (arg0 == HV_EOK)
		return 0;
	if (arg0 == HV_EWOULDBLOCK) {
		if (--retries > 0) {
			udelay(100);
			goto retry;
		}
		printk(KERN_WARNING "SUN4V: tod_set() timed out.\n");
		return -EAGAIN;
	}
	printk(KERN_WARNING "SUN4V: tod_set() not supported.\n");
	return -EOPNOTSUPP;
}

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static int __init clock_model_matches(const char *model)
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{
	if (strcmp(model, "mk48t02") &&
	    strcmp(model, "mk48t08") &&
	    strcmp(model, "mk48t59") &&
	    strcmp(model, "m5819") &&
	    strcmp(model, "m5819p") &&
	    strcmp(model, "m5823") &&
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	    strcmp(model, "ds1287") &&
	    strcmp(model, "bq4802"))
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		return 0;

	return 1;
}

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static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
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{
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	struct device_node *dp = op->node;
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	const char *model = of_get_property(dp, "model", NULL);
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	const char *compat = of_get_property(dp, "compatible", NULL);
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	unsigned long size, flags;
	void __iomem *regs;
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	if (!model)
		model = compat;

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	if (!model || !clock_model_matches(model))
		return -ENODEV;
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	/* On an Enterprise system there can be multiple mostek clocks.
	 * We should only match the one that is on the central FHC bus.
	 */
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	if (!strcmp(dp->parent->name, "fhc") &&
	    strcmp(dp->parent->parent->name, "central") != 0)
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		return -ENODEV;

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	size = (op->resource[0].end - op->resource[0].start) + 1;
	regs = of_ioremap(&op->resource[0], 0, size, "clock");
	if (!regs)
		return -ENOMEM;
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#ifdef CONFIG_PCI
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	if (!strcmp(model, "ds1287") ||
	    !strcmp(model, "m5819") ||
	    !strcmp(model, "m5819p") ||
	    !strcmp(model, "m5823")) {
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		ds1287_regs = (unsigned long) regs;
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	} else if (!strcmp(model, "bq4802")) {
		bq4802_regs = regs;
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	} else
#endif
	if (model[5] == '0' && model[6] == '2') {
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		mstk48t02_regs = regs;
	} else if(model[5] == '0' && model[6] == '8') {
		mstk48t08_regs = regs;
		mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
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	} else {
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		mstk48t59_regs = regs;
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		mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
	}

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	printk(KERN_INFO "%s: Clock regs at %p\n", dp->full_name, regs);
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	local_irq_save(flags);
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	if (mstk48t02_regs != NULL) {
		/* Report a low battery voltage condition. */
		if (has_low_battery())
			prom_printf("NVRAM: Low battery voltage!\n");
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		/* Kick start the clock if it is completely stopped. */
		if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
			kick_start_clock();
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	}

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	set_system_time();
	
	local_irq_restore(flags);
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	return 0;
}

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static struct of_device_id clock_match[] = {
	{
		.name = "eeprom",
	},
	{
		.name = "rtc",
	},
	{},
};
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static struct of_platform_driver clock_driver = {
	.name		= "clock",
	.match_table	= clock_match,
	.probe		= clock_probe,
};
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static int __init clock_init(void)
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{
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	if (this_is_starfire) {
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		xtime.tv_sec = starfire_get_time();
		xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
		set_normalized_timespec(&wall_to_monotonic,
		                        -xtime.tv_sec, -xtime.tv_nsec);
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		return 0;
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	}
	if (tlb_type == hypervisor) {
		xtime.tv_sec = hypervisor_get_time();
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		xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
		set_normalized_timespec(&wall_to_monotonic,
		                        -xtime.tv_sec, -xtime.tv_nsec);
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		return 0;
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	}

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	return of_register_driver(&clock_driver, &of_bus_type);
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}

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/* Must be after subsys_initcall() so that busses are probed.  Must
 * be before device_initcall() because things like the RTC driver
 * need to see the clock registers.
 */
fs_initcall(clock_init);

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/* This is gets the master TICK_INT timer going. */
static unsigned long sparc64_init_timers(void)
{
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	struct device_node *dp;
	struct property *prop;
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	unsigned long clock;
#ifdef CONFIG_SMP
	extern void smp_tick_init(void);
#endif

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	dp = of_find_node_by_path("/");
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	if (tlb_type == spitfire) {
		unsigned long ver, manuf, impl;

		__asm__ __volatile__ ("rdpr %%ver, %0"
				      : "=&r" (ver));
		manuf = ((ver >> 48) & 0xffff);
		impl = ((ver >> 32) & 0xffff);
		if (manuf == 0x17 && impl == 0x13) {
			/* Hummingbird, aka Ultra-IIe */
			tick_ops = &hbtick_operations;
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			prop = of_find_property(dp, "stick-frequency", NULL);
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		} else {
			tick_ops = &tick_operations;
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			cpu_find_by_instance(0, &dp, NULL);
			prop = of_find_property(dp, "clock-frequency", NULL);
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		}
	} else {
		tick_ops = &stick_operations;
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		prop = of_find_property(dp, "stick-frequency", NULL);
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	}
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	clock = *(unsigned int *) prop->value;
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#ifdef CONFIG_SMP
	smp_tick_init();
#endif

	return clock;
}

struct freq_table {
	unsigned long clock_tick_ref;
	unsigned int ref_freq;
};
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static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
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unsigned long sparc64_get_clock_tick(unsigned int cpu)
{
	struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);

	if (ft->clock_tick_ref)
		return ft->clock_tick_ref;
	return cpu_data(cpu).clock_tick;
}

#ifdef CONFIG_CPU_FREQ

static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
				    void *data)
{
	struct cpufreq_freqs *freq = data;
	unsigned int cpu = freq->cpu;
	struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);

	if (!ft->ref_freq) {
		ft->ref_freq = freq->old;
		ft->clock_tick_ref = cpu_data(cpu).clock_tick;
	}
	if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
	    (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
	    (val == CPUFREQ_RESUMECHANGE)) {
		cpu_data(cpu).clock_tick =
			cpufreq_scale(ft->clock_tick_ref,
				      ft->ref_freq,
				      freq->new);
	}

	return 0;
}

static struct notifier_block sparc64_cpufreq_notifier_block = {
	.notifier_call	= sparc64_cpufreq_notifier
};

#endif /* CONFIG_CPU_FREQ */

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static int sparc64_next_event(unsigned long delta,
			      struct clock_event_device *evt)
{
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	return tick_ops->add_compare(delta) ? -ETIME : 0;
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}

static void sparc64_timer_setup(enum clock_event_mode mode,
				struct clock_event_device *evt)
{
	switch (mode) {
	case CLOCK_EVT_MODE_ONESHOT:
		break;

	case CLOCK_EVT_MODE_SHUTDOWN:
		tick_ops->disable_irq();
		break;

	case CLOCK_EVT_MODE_PERIODIC:
	case CLOCK_EVT_MODE_UNUSED:
		WARN_ON(1);
		break;
	};
}

static struct clock_event_device sparc64_clockevent = {
	.features	= CLOCK_EVT_FEAT_ONESHOT,
	.set_mode	= sparc64_timer_setup,
	.set_next_event	= sparc64_next_event,
	.rating		= 100,
	.shift		= 30,
	.irq		= -1,
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};
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static DEFINE_PER_CPU(struct clock_event_device, sparc64_events);
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void timer_interrupt(int irq, struct pt_regs *regs)
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{
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	struct pt_regs *old_regs = set_irq_regs(regs);
	unsigned long tick_mask = tick_ops->softint_mask;
	int cpu = smp_processor_id();
	struct clock_event_device *evt = &per_cpu(sparc64_events, cpu);

	clear_softint(tick_mask);

	irq_enter();

	kstat_this_cpu.irqs[0]++;

	if (unlikely(!evt->event_handler)) {
		printk(KERN_WARNING
		       "Spurious SPARC64 timer interrupt on cpu %d\n", cpu);
	} else
		evt->event_handler(evt);

	irq_exit();