Commit 09e71a6f authored by Dave Jiang's avatar Dave Jiang Committed by Jon Mason
Browse files

ntb: fix SKX NTB config space size register offsets



The offsets for the SZ registers are wrong. Updated.

Signed-off-by: default avatarDave Jiang <dave.jiang@intel.com>
Reported-by: default avatarSandeep Mann <sandeep@purestorage.com>
Tested-by: default avatarZachary Ross <zacharyx.ross@intel.com>
Signed-off-by: default avatarJon Mason <jdmason@kudzu.us>
parent 5c43c52d
...@@ -152,10 +152,10 @@ ...@@ -152,10 +152,10 @@
#define XEON_SPAD_COUNT 16 #define XEON_SPAD_COUNT 16
/* Intel Skylake Xeon hardware */ /* Intel Skylake Xeon hardware */
#define SKX_IMBAR1SZ_OFFSET 0x00d1 #define SKX_IMBAR1SZ_OFFSET 0x00d0
#define SKX_IMBAR2SZ_OFFSET 0x00d5 #define SKX_IMBAR2SZ_OFFSET 0x00d1
#define SKX_EMBAR1SZ_OFFSET 0x00d3 #define SKX_EMBAR1SZ_OFFSET 0x00d2
#define SKX_EMBAR2SZ_OFFSET 0x00d6 #define SKX_EMBAR2SZ_OFFSET 0x00d3
#define SKX_DEVCTRL_OFFSET 0x0098 #define SKX_DEVCTRL_OFFSET 0x0098
#define SKX_DEVSTS_OFFSET 0x009a #define SKX_DEVSTS_OFFSET 0x009a
#define SKX_UNCERRSTS_OFFSET 0x014c #define SKX_UNCERRSTS_OFFSET 0x014c
......
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