Commit 21770332 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Arnd Bergmann:
 "A few fixes that came in too late to make it into the first set of
  pull requests but would still be nice to have in -rc1.

  The majority of these are trivial build fixes for bugs that I found
  myself using randconfig testing, and a set of two patches from Uwe to
  mark DT strings as 'const' where appropriate, to resolve inconsistent
  section attributes"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: make of_device_ids const
  ARM: make arrays containing machine compatible strings const
  ARM: mm: Remove Kconfig symbol CACHE_PL310
  ARM: rockchip: force built-in regulator support for PM
  ARM: mvebu: build armada375-smp code conditionally
  ARM: sti: always enable RESET_CONTROLLER
  ARM: rockchip: make rockchip_suspend_init conditional
  ARM: ixp4xx: fix {in,out}s{bwl} data types
  ARM: prima2: do not select SMP_ON_UP
  ARM: at91: fix pm declarations
  ARM: davinci: multi-soc kernels require AUTO_ZRELADDR
  ARM: davinci: davinci_cfg_reg cannot be init
  ARM: BCM: put back ARCH_MULTI_V7 dependency for mobile
  ARM: vexpress: use ARM_CPU_SUSPEND if needed
  ARM: dts: add I2C device nodes for Broadcom Cygnus
  ARM: dts: BCM63xx: fix L2 cache properties
parents c8c6c9ba 444d2d33
......@@ -70,6 +70,26 @@
};
};
i2c0: i2c@18008000 {
compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
reg = <0x18008000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
clock-frequency = <100000>;
status = "disabled";
};
i2c1: i2c@1800b000 {
compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
reg = <0x1800b000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
clock-frequency = <100000>;
status = "disabled";
};
uart0: serial@18020000 {
compatible = "snps,dw-apb-uart";
reg = <0x18020000 0x100>;
......
......@@ -66,8 +66,9 @@
reg = <0x1d000 0x1000>;
cache-unified;
cache-level = <2>;
cache-sets = <16>;
cache-size = <0x80000>;
cache-size = <524288>;
cache-sets = <1024>;
cache-line-size = <32>;
interrupts = <GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>;
};
......
......@@ -231,7 +231,7 @@ static void cpu_pmu_destroy(struct arm_pmu *cpu_pmu)
/*
* PMU platform driver and devicetree bindings.
*/
static struct of_device_id cpu_pmu_of_device_ids[] = {
static const struct of_device_id cpu_pmu_of_device_ids[] = {
{.compatible = "arm,cortex-a17-pmu", .data = armv7_a17_pmu_init},
{.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init},
{.compatible = "arm,cortex-a12-pmu", .data = armv7_a12_pmu_init},
......
......@@ -64,7 +64,6 @@ config SOC_SAMA5D4
select SOC_SAMA5
select CLKSRC_MMIO
select CACHE_L2X0
select CACHE_PL310
select HAVE_FB_ATMEL
select HAVE_AT91_UTMI
select HAVE_AT91_SMD
......
......@@ -183,7 +183,7 @@ static struct clock_event_device clkevt = {
void __iomem *at91_st_base;
EXPORT_SYMBOL_GPL(at91_st_base);
static struct of_device_id at91rm9200_st_timer_ids[] = {
static const struct of_device_id at91rm9200_st_timer_ids[] = {
{ .compatible = "atmel,at91rm9200-st" },
{ /* sentinel */ }
};
......
......@@ -35,10 +35,10 @@ extern void __init at91sam9260_pm_init(void);
extern void __init at91sam9g45_pm_init(void);
extern void __init at91sam9x5_pm_init(void);
#else
void __init at91rm9200_pm_init(void) { }
void __init at91sam9260_pm_init(void) { }
void __init at91sam9g45_pm_init(void) { }
void __init at91sam9x5_pm_init(void) { }
static inline void __init at91rm9200_pm_init(void) { }
static inline void __init at91sam9260_pm_init(void) { }
static inline void __init at91sam9g45_pm_init(void) { }
static inline void __init at91sam9x5_pm_init(void) { }
#endif
#endif /* _AT91_GENERIC_H */
......@@ -226,7 +226,7 @@ void at91_pm_set_standby(void (*at91_standby)(void))
}
}
static struct of_device_id ramc_ids[] = {
static const struct of_device_id ramc_ids[] __initconst = {
{ .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },
{ .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },
{ .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby },
......@@ -234,7 +234,7 @@ static struct of_device_id ramc_ids[] = {
{ /*sentinel*/ }
};
static void at91_dt_ramc(void)
static __init void at91_dt_ramc(void)
{
struct device_node *np;
const struct of_device_id *of_id;
......
......@@ -16,7 +16,7 @@
#include <linux/init.h>
#include <asm/mach/arch.h>
static const char *axxia_dt_match[] __initconst = {
static const char *const axxia_dt_match[] __initconst = {
"lsi,axm5516",
"lsi,axm5516-sim",
"lsi,axm5516-emu",
......
......@@ -68,7 +68,7 @@ config ARCH_BCM_MOBILE
This enables support for systems based on Broadcom mobile SoCs.
config ARCH_BCM_281XX
bool "Broadcom BCM281XX SoC family"
bool "Broadcom BCM281XX SoC family" if ARCH_MULTI_V7
select ARCH_BCM_MOBILE
select HAVE_SMP
help
......@@ -77,7 +77,7 @@ config ARCH_BCM_281XX
variants.
config ARCH_BCM_21664
bool "Broadcom BCM21664 SoC family"
bool "Broadcom BCM21664 SoC family" if ARCH_MULTI_V7
select ARCH_BCM_MOBILE
select HAVE_SMP
help
......
......@@ -17,7 +17,7 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
static const char *brcmstb_match[] __initconst = {
static const char *const brcmstb_match[] __initconst = {
"brcm,bcm7445",
"brcm,brcmstb",
NULL
......
......@@ -32,12 +32,14 @@ config ARCH_DAVINCI_DM646x
config ARCH_DAVINCI_DA830
bool "DA830/OMAP-L137/AM17x based system"
depends on !ARCH_DAVINCI_DMx || AUTO_ZRELADDR
select ARCH_DAVINCI_DA8XX
select CPU_DCACHE_WRITETHROUGH # needed on silicon revs 1.0, 1.1
select CP_INTC
config ARCH_DAVINCI_DA850
bool "DA850/OMAP-L138/AM18x based system"
depends on !ARCH_DAVINCI_DMx || AUTO_ZRELADDR
select ARCH_DAVINCI_DA8XX
select CP_INTC
......
......@@ -20,7 +20,7 @@
#define DA8XX_NUM_UARTS 3
static struct of_device_id da8xx_irq_match[] __initdata = {
static const struct of_device_id da8xx_irq_match[] __initconst = {
{ .compatible = "ti,cp-intc", .data = cp_intc_of_init, },
{ }
};
......
......@@ -30,7 +30,7 @@ static void __iomem *pinmux_base;
/*
* Sets the DAVINCI MUX register based on the table
*/
int __init_or_module davinci_cfg_reg(const unsigned long index)
int davinci_cfg_reg(const unsigned long index)
{
static DEFINE_SPINLOCK(mux_spin_lock);
struct davinci_soc_info *soc_info = &davinci_soc_info;
......@@ -101,7 +101,7 @@ int __init_or_module davinci_cfg_reg(const unsigned long index)
}
EXPORT_SYMBOL(davinci_cfg_reg);
int __init_or_module davinci_cfg_reg_list(const short pins[])
int davinci_cfg_reg_list(const short pins[])
{
int i, error = -EINVAL;
......
......@@ -227,7 +227,7 @@ static void __init exynos_dt_machine_init(void)
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static char const *exynos_dt_compat[] __initconst = {
static char const *const exynos_dt_compat[] __initconst = {
"samsung,exynos3",
"samsung,exynos3250",
"samsung,exynos4",
......
......@@ -587,7 +587,7 @@ static struct exynos_pm_data exynos5420_pm_data = {
.cpu_suspend = exynos5420_cpu_suspend,
};
static struct of_device_id exynos_pmu_of_device_ids[] = {
static const struct of_device_id exynos_pmu_of_device_ids[] __initconst = {
{
.compatible = "samsung,exynos3250-pmu",
.data = &exynos3250_pm_data,
......
......@@ -169,7 +169,7 @@ static void __init highbank_init(void)
platform_device_register(&highbank_cpuidle_device);
}
static const char *highbank_match[] __initconst = {
static const char *const highbank_match[] __initconst = {
"calxeda,highbank",
"calxeda,ecx-2000",
NULL,
......
......@@ -45,7 +45,7 @@ static void __init hi3620_map_io(void)
iotable_init(hi3620_io_desc, ARRAY_SIZE(hi3620_io_desc));
}
static const char *hi3xxx_compat[] __initconst = {
static const char *const hi3xxx_compat[] __initconst = {
"hisilicon,hi3620-hi4511",
NULL,
};
......@@ -55,7 +55,7 @@ DT_MACHINE_START(HI3620, "Hisilicon Hi3620 (Flattened Device Tree)")
.dt_compat = hi3xxx_compat,
MACHINE_END
static const char *hix5hd2_compat[] __initconst = {
static const char *const hix5hd2_compat[] __initconst = {
"hisilicon,hix5hd2",
NULL,
};
......@@ -64,7 +64,7 @@ DT_MACHINE_START(HIX5HD2_DT, "Hisilicon HIX5HD2 (Flattened Device Tree)")
.dt_compat = hix5hd2_compat,
MACHINE_END
static const char *hip04_compat[] __initconst = {
static const char *const hip04_compat[] __initconst = {
"hisilicon,hip04-d01",
NULL,
};
......@@ -73,7 +73,7 @@ DT_MACHINE_START(HIP04, "Hisilicon HiP04 (Flattened Device Tree)")
.dt_compat = hip04_compat,
MACHINE_END
static const char *hip01_compat[] __initconst = {
static const char *const hip01_compat[] __initconst = {
"hisilicon,hip01",
"hisilicon,hip01-ca9x2",
NULL,
......
......@@ -68,7 +68,7 @@ int imx_mmdc_get_ddr_type(void)
return ddr_type;
}
static struct of_device_id imx_mmdc_dt_ids[] = {
static const struct of_device_id imx_mmdc_dt_ids[] = {
{ .compatible = "fsl,imx6q-mmdc", },
{ /* sentinel */ }
};
......
......@@ -245,8 +245,10 @@ static inline void outb(u8 value, u32 addr)
}
#define outsb outsb
static inline void outsb(u32 io_addr, const u8 *vaddr, u32 count)
static inline void outsb(u32 io_addr, const void *p, u32 count)
{
const u8 *vaddr = p;
while (count--)
outb(*vaddr++, io_addr);
}
......@@ -262,8 +264,9 @@ static inline void outw(u16 value, u32 addr)
}
#define outsw outsw
static inline void outsw(u32 io_addr, const u16 *vaddr, u32 count)
static inline void outsw(u32 io_addr, const void *p, u32 count)
{
const u16 *vaddr = p;
while (count--)
outw(cpu_to_le16(*vaddr++), io_addr);
}
......@@ -275,8 +278,9 @@ static inline void outl(u32 value, u32 addr)
}
#define outsl outsl
static inline void outsl(u32 io_addr, const u32 *vaddr, u32 count)
static inline void outsl(u32 io_addr, const void *p, u32 count)
{
const u32 *vaddr = p;
while (count--)
outl(cpu_to_le32(*vaddr++), io_addr);
}
......@@ -294,8 +298,9 @@ static inline u8 inb(u32 addr)
}
#define insb insb
static inline void insb(u32 io_addr, u8 *vaddr, u32 count)
static inline void insb(u32 io_addr, void *p, u32 count)
{
u8 *vaddr = p;
while (count--)
*vaddr++ = inb(io_addr);
}
......@@ -313,8 +318,9 @@ static inline u16 inw(u32 addr)
}
#define insw insw
static inline void insw(u32 io_addr, u16 *vaddr, u32 count)
static inline void insw(u32 io_addr, void *p, u32 count)
{
u16 *vaddr = p;
while (count--)
*vaddr++ = le16_to_cpu(inw(io_addr));
}
......@@ -330,8 +336,9 @@ static inline u32 inl(u32 addr)
}
#define insl insl
static inline void insl(u32 io_addr, u32 *vaddr, u32 count)
static inline void insl(u32 io_addr, void *p, u32 count)
{
u32 *vaddr = p;
while (count--)
*vaddr++ = le32_to_cpu(inl(io_addr));
}
......
......@@ -103,7 +103,7 @@ static void __init keystone_init_meminfo(void)
pr_info("Switching to high address space at 0x%llx\n", (u64)offset);
}
static const char *keystone_match[] __initconst = {
static const char *const keystone_match[] __initconst = {
"ti,keystone",
NULL,
};
......
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