Commit 27a511c6 authored by Paul Mundt's avatar Paul Mundt
Browse files

sh: Disable initial cache flush on SH-5.


Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent c881cbc0
......@@ -63,24 +63,11 @@ static void __init speculative_execution_init(void)
/*
* Generic first-level cache init
*/
#ifdef CONFIG_SUPERH32
static void __init cache_init(void)
{
unsigned long ccr, flags;
/* First setup the rest of the I-cache info */
current_cpu_data.icache.entry_mask = current_cpu_data.icache.way_incr -
current_cpu_data.icache.linesz;
current_cpu_data.icache.way_size = current_cpu_data.icache.sets *
current_cpu_data.icache.linesz;
/* And the D-cache too */
current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr -
current_cpu_data.dcache.linesz;
current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets *
current_cpu_data.dcache.linesz;
jump_to_P2();
ccr = ctrl_inl(CCR);
......@@ -160,6 +147,9 @@ static void __init cache_init(void)
ctrl_outl(flags, CCR);
back_to_P1();
}
#else
#define cache_init() do { } while (0)
#endif
#ifdef CONFIG_SH_DSP
static void __init release_dsp(void)
......@@ -230,6 +220,20 @@ asmlinkage void __cpuinit sh_cpu_init(void)
if (current_cpu_data.type == CPU_SH_NONE)
panic("Unknown CPU");
/* First setup the rest of the I-cache info */
current_cpu_data.icache.entry_mask = current_cpu_data.icache.way_incr -
current_cpu_data.icache.linesz;
current_cpu_data.icache.way_size = current_cpu_data.icache.sets *
current_cpu_data.icache.linesz;
/* And the D-cache too */
current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr -
current_cpu_data.dcache.linesz;
current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets *
current_cpu_data.dcache.linesz;
/* Init the cache */
cache_init();
......
Supports Markdown
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment