Commit 31ab269a authored by Shaohua Li's avatar Shaohua Li Committed by Linus Torvalds
Browse files

[PATCH] x86: add MCE resume



It's widely seen a MCE non-fatal error reported after resume.  It seems MCE
resume is lacked under ia32.  This patch tries to fix the gap.
Signed-off-by: default avatarShaohua Li <shaohua.li@intel.com>
Acked-by: default avatarPavel Machek <pavel@ucw.cz>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 47b90ffe
......@@ -30,8 +30,6 @@ static int disable_x86_serial_nr __devinitdata = 1;
struct cpu_dev * cpu_devs[X86_VENDOR_NUM] = {};
extern void mcheck_init(struct cpuinfo_x86 *c);
extern int disable_pse;
static void default_init(struct cpuinfo_x86 * c)
......@@ -429,9 +427,8 @@ void __devinit identify_cpu(struct cpuinfo_x86 *c)
}
/* Init Machine Check Exception if available. */
#ifdef CONFIG_X86_MCE
mcheck_init(c);
#endif
if (c == &boot_cpu_data)
sysenter_setup();
enable_sep_cpu();
......
......@@ -68,7 +68,7 @@ static fastcall void k7_machine_check(struct pt_regs * regs, long error_code)
/* AMD K7 machine check is Intel like */
void __devinit amd_mcheck_init(struct cpuinfo_x86 *c)
void amd_mcheck_init(struct cpuinfo_x86 *c)
{
u32 l, h;
int i;
......
......@@ -16,7 +16,7 @@
#include "mce.h"
int mce_disabled __devinitdata = 0;
int mce_disabled = 0;
int nr_mce_banks;
EXPORT_SYMBOL_GPL(nr_mce_banks); /* non-fatal.o */
......@@ -31,7 +31,7 @@ static fastcall void unexpected_machine_check(struct pt_regs * regs, long error_
void fastcall (*machine_check_vector)(struct pt_regs *, long error_code) = unexpected_machine_check;
/* This has to be run for each processor */
void __devinit mcheck_init(struct cpuinfo_x86 *c)
void mcheck_init(struct cpuinfo_x86 *c)
{
if (mce_disabled==1)
return;
......
......@@ -77,7 +77,7 @@ fastcall void smp_thermal_interrupt(struct pt_regs *regs)
}
/* P4/Xeon Thermal regulation detect and init */
static void __devinit intel_init_thermal(struct cpuinfo_x86 *c)
static void intel_init_thermal(struct cpuinfo_x86 *c)
{
u32 l, h;
unsigned int cpu = smp_processor_id();
......@@ -231,7 +231,7 @@ static fastcall void intel_machine_check(struct pt_regs * regs, long error_code)
}
void __devinit intel_p4_mcheck_init(struct cpuinfo_x86 *c)
void intel_p4_mcheck_init(struct cpuinfo_x86 *c)
{
u32 l, h;
int i;
......
......@@ -28,7 +28,7 @@ static fastcall void pentium_machine_check(struct pt_regs * regs, long error_cod
}
/* Set up machine check reporting for processors with Intel style MCE */
void __devinit intel_p5_mcheck_init(struct cpuinfo_x86 *c)
void intel_p5_mcheck_init(struct cpuinfo_x86 *c)
{
u32 l, h;
......
......@@ -79,7 +79,7 @@ static fastcall void intel_machine_check(struct pt_regs * regs, long error_code)
}
/* Set up machine check reporting for processors with Intel style MCE */
void __devinit intel_p6_mcheck_init(struct cpuinfo_x86 *c)
void intel_p6_mcheck_init(struct cpuinfo_x86 *c)
{
u32 l, h;
int i;
......
......@@ -22,7 +22,7 @@ static fastcall void winchip_machine_check(struct pt_regs * regs, long error_cod
}
/* Set up machine check reporting on the Winchip C6 series */
void __devinit winchip_mcheck_init(struct cpuinfo_x86 *c)
void winchip_mcheck_init(struct cpuinfo_x86 *c)
{
u32 lo, hi;
machine_check_vector = winchip_machine_check;
......
......@@ -118,6 +118,7 @@ void __restore_processor_state(struct saved_context *ctxt)
fix_processor_context();
do_fpu_end();
mtrr_ap_init();
mcheck_init(&boot_cpu_data);
}
void restore_processor_state(void)
......
......@@ -718,4 +718,10 @@ extern void mtrr_bp_init(void);
#define mtrr_bp_init() do {} while (0)
#endif
#ifdef CONFIG_X86_MCE
extern void mcheck_init(struct cpuinfo_x86 *c);
#else
#define mcheck_init(c) do {} while(0)
#endif
#endif /* __ASM_I386_PROCESSOR_H */
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