Commit 510c72ad authored by Paul Mundt's avatar Paul Mundt
Browse files

sh: Fixup various PAGE_SIZE == 4096 assumptions.



There were a number of places that made evil PAGE_SIZE == 4k
assumptions that ended up breaking when trying to play with
8k and 64k page sizes, this fixes those up.

The most significant change is the way we load THREAD_SIZE,
previously this was done via:

	mov	#(THREAD_SIZE >> 8), reg
	shll8	reg

to avoid a memory access and allow the immediate load. With
a 64k PAGE_SIZE, we're out of range for the immediate load
size without resorting to special instructions available in
later ISAs (movi20s and so on). The "workaround" for this is
to bump up the shift to 10 and insert a shll2, which gives a
bit more flexibility while still being much cheaper than a
memory access.
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 1dc41e58
......@@ -335,7 +335,7 @@ general_exception:
/* This code makes some assumptions to improve performance.
* Make sure they are stil true. */
#if PTRS_PER_PGD != PTRS_PER_PTE
#error PDG and PTE sizes don't match
#error PGD and PTE sizes don't match
#endif
/* gas doesn't flag impossible values for mov #immediate as an error */
......@@ -547,8 +547,9 @@ ENTRY(handle_exception)
bt/s 1f ! It's a kernel to kernel transition.
mov r15, k0 ! save original stack to k0
/* User space to kernel */
mov #(THREAD_SIZE >> 8), k1
mov #(THREAD_SIZE >> 10), k1
shll8 k1 ! k1 := THREAD_SIZE
shll2 k1
add current, k1
mov k1, r15 ! change to kernel stack
!
......
......@@ -33,7 +33,7 @@ ENTRY(empty_zero_page)
.long 0x00360000 /* INITRD_START */
.long 0x000a0000 /* INITRD_SIZE */
.long 0
.balign 4096,0,4096
.balign PAGE_SIZE,0,PAGE_SIZE
.text
/*
......@@ -70,8 +70,9 @@ ENTRY(_stext)
!
mov.l 2f, r0
mov r0, r15 ! Set initial r15 (stack pointer)
mov #(THREAD_SIZE >> 8), r1
mov #(THREAD_SIZE >> 10), r1
shll8 r1 ! r1 = THREAD_SIZE
shll2 r1
sub r1, r0 !
#ifdef CONFIG_CPU_HAS_SR_RB
ldc r0, r7_bank ! ... and initial thread_info
......
......@@ -7,11 +7,9 @@
* This source code is licensed under the GNU General Public License,
* Version 2. See the file COPYING for more details.
*/
#include <linux/linkage.h>
#define PAGE_SIZE 4096 /* must be same value as in <asm/page.h> */
#include <asm/addrspace.h>
#include <asm/page.h>
.globl relocate_new_kernel
relocate_new_kernel:
......@@ -20,8 +18,8 @@ relocate_new_kernel:
/* r6 = start_address */
/* r7 = vbr_reg */
mov.l 10f,r8 /* 4096 */
mov.l 11f,r9 /* 0xa0000000 */
mov.l 10f,r8 /* PAGE_SIZE */
mov.l 11f,r9 /* P2SEG */
/* stack setting */
add r8,r5
......@@ -32,7 +30,7 @@ relocate_new_kernel:
0:
mov.l @r4+,r0 /* cmd = *ind++ */
1: /* addr = (cmd | 0xa0000000) & 0xfffffff0 */
1: /* addr = (cmd | P2SEG) & 0xfffffff0 */
mov r0,r2
or r9,r2
mov #-16,r1
......@@ -92,7 +90,7 @@ relocate_new_kernel:
10:
.long PAGE_SIZE
11:
.long 0xa0000000
.long P2SEG
relocate_new_kernel_end:
......
......@@ -225,7 +225,7 @@ static inline void flush_cache_4096(unsigned long start,
*/
if ((cpu_data->flags & CPU_HAS_P2_FLUSH_BUG) ||
(start < CACHE_OC_ADDRESS_ARRAY))
exec_offset = 0x20000000;
exec_offset = 0x20000000;
local_irq_save(flags);
__flush_cache_4096(start | SH_CACHE_ASSOC,
......@@ -246,7 +246,7 @@ void flush_dcache_page(struct page *page)
/* Loop all the D-cache */
n = cpu_data->dcache.n_aliases;
for (i = 0; i < n; i++, addr += PAGE_SIZE)
for (i = 0; i < n; i++, addr += 4096)
flush_cache_4096(addr, phys);
}
......
/* $Id: clear_page.S,v 1.13 2003/08/25 17:03:10 lethal Exp $
*
/*
* __clear_user_page, __clear_user, clear_page implementation of SuperH
*
* Copyright (C) 2001 Kaz Kojima
* Copyright (C) 2001, 2002 Niibe Yutaka
*
* Copyright (C) 2006 Paul Mundt
*/
#include <linux/linkage.h>
#include <asm/page.h>
/*
* clear_page_slow
......@@ -18,11 +18,11 @@
/*
* r0 --- scratch
* r4 --- to
* r5 --- to + 4096
* r5 --- to + PAGE_SIZE
*/
ENTRY(clear_page_slow)
mov r4,r5
mov.w .Llimit,r0
mov.l .Llimit,r0
add r0,r5
mov #0,r0
!
......@@ -50,7 +50,7 @@ ENTRY(clear_page_slow)
!
rts
nop
.Llimit: .word (4096-28)
.Llimit: .long (PAGE_SIZE-28)
ENTRY(__clear_user)
!
......@@ -164,10 +164,10 @@ ENTRY(__clear_user)
* r0 --- scratch
* r4 --- to
* r5 --- orig_to
* r6 --- to + 4096
* r6 --- to + PAGE_SIZE
*/
ENTRY(__clear_user_page)
mov.w .L4096,r0
mov.l .Lpsz,r0
mov r4,r6
add r0,r6
mov #0,r0
......@@ -191,7 +191,7 @@ ENTRY(__clear_user_page)
!
rts
nop
.L4096: .word 4096
.Lpsz: .long PAGE_SIZE
#endif
/* $Id: copy_page.S,v 1.8 2003/08/25 17:03:10 lethal Exp $
*
/*
* copy_page, __copy_user_page, __copy_user implementation of SuperH
*
* Copyright (C) 2001 Niibe Yutaka & Kaz Kojima
* Copyright (C) 2002 Toshinobu Sugioka
*
* Copyright (C) 2006 Paul Mundt
*/
#include <linux/linkage.h>
#include <asm/page.h>
/*
* copy_page_slow
......@@ -18,7 +18,7 @@
/*
* r0, r1, r2, r3, r4, r5, r6, r7 --- scratch
* r8 --- from + 4096
* r8 --- from + PAGE_SIZE
* r9 --- not used
* r10 --- to
* r11 --- from
......@@ -30,7 +30,7 @@ ENTRY(copy_page_slow)
mov r4,r10
mov r5,r11
mov r5,r8
mov.w .L4096,r0
mov.l .Lpsz,r0
add r0,r8
!
1: mov.l @r11+,r0
......@@ -80,7 +80,7 @@ ENTRY(copy_page_slow)
/*
* r0, r1, r2, r3, r4, r5, r6, r7 --- scratch
* r8 --- from + 4096
* r8 --- from + PAGE_SIZE
* r9 --- orig_to
* r10 --- to
* r11 --- from
......@@ -94,7 +94,7 @@ ENTRY(__copy_user_page)
mov r5,r11
mov r6,r9
mov r5,r8
mov.w .L4096,r0
mov.l .Lpsz,r0
add r0,r8
!
1: ocbi @r9
......@@ -129,7 +129,7 @@ ENTRY(__copy_user_page)
rts
nop
#endif
.L4096: .word 4096
.Lpsz: .long PAGE_SIZE
/*
* __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n);
* Return the number of bytes NOT copied
......
......@@ -217,7 +217,6 @@ static struct kcore_list kcore_mem, kcore_vmalloc;
void __init mem_init(void)
{
extern unsigned long empty_zero_page[1024];
int codesize, reservedpages, datasize, initsize;
int tmp;
extern unsigned long memory_start;
......
......@@ -39,8 +39,6 @@ static void copy_page_dma(void *to, void *from)
static void clear_page_dma(void *to)
{
extern unsigned long empty_zero_page[1024];
/*
* We get invoked quite early on, if the DMAC hasn't been initialized
* yet, fall back on the slow manual implementation.
......
......@@ -23,8 +23,9 @@
#ifdef CONFIG_HAS_SR_RB
stc r7_bank, \ti
#else
mov #((THREAD_SIZE - 1)>> 8) ^ 0xff, \tmp
mov #((THREAD_SIZE - 1) >> 10) ^ 0xff, \tmp
shll8 \tmp
shll2 \tmp
mov r15, \ti
and \tmp, \ti
#endif
......
......@@ -47,8 +47,8 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
#define PGDIR_MASK (~(PGDIR_SIZE-1))
/* Entries per level */
#define PTRS_PER_PTE (1 << PTE_BITS)
#define PTRS_PER_PGD (1 << PGDIR_BITS)
#define PTRS_PER_PTE (PAGE_SIZE / 4)
#define PTRS_PER_PGD (PAGE_SIZE / 4)
#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
#define FIRST_USER_ADDRESS 0
......@@ -57,7 +57,7 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
/*
* First 1MB map is used by fixed purpose.
* Currently only 4-enty (16kB) is used (see arch/sh/mm/cache.c)
* Currently only 4-entry (16kB) is used (see arch/sh/mm/cache.c)
*/
#define VMALLOC_START (P3SEG+0x00100000)
#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
......
......@@ -90,13 +90,7 @@ static inline struct thread_info *current_thread_info(void)
#endif
#define free_thread_info(ti) kfree(ti)
#else /* !__ASSEMBLY__ */
/* how to get the thread information struct from ASM */
#define GET_THREAD_INFO(reg) \
stc r7_bank, reg
#endif
#endif /* __ASSEMBLY__ */
/*
* thread information flags
......
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