Commit 94409d6e authored by Anton Vorontsov's avatar Anton Vorontsov Committed by Kumar Gala
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powerpc: Add device tree bindings for BCSR GPIO banks

The patch adds bindings for BCSR GPIO banks, the bindings are used to
describe particular BCSR registers that act as simple GPIO controllers.
These GPIO banks might control power switches, SPI chip-selects, LEDs,

While at it, also fix "length" spelling error in the PIXIS FPGA
Signed-off-by: default avatarAnton Vorontsov <>
Signed-off-by: default avatarKumar Gala <>
parent 1b9e8904
......@@ -18,7 +18,7 @@ This is the memory-mapped registers for on board FPGA.
Required properities:
- compatible : should be "fsl,fpga-pixis".
- reg : should contain the address and the lenght of the FPPGA register
- reg : should contain the address and the length of the FPPGA register
Example (MPC8610HPCD):
......@@ -27,3 +27,33 @@ Example (MPC8610HPCD):
compatible = "fsl,fpga-pixis";
reg = <0xe8000000 32>;
* Freescale BCSR GPIO banks
Some BCSR registers act as simple GPIO controllers, each such
register can be represented by the gpio-controller node.
Required properities:
- compatible : Should be "fsl,<board>-bcsr-gpio".
- reg : Should contain the address and the length of the GPIO bank
- #gpio-cells : Should be two. The first cell is the pin number and the
second cell is used to specify optional paramters (currently unused).
- gpio-controller : Marks the port as GPIO controller.
bcsr@1,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8360mds-bcsr";
reg = <1 0 0x8000>;
ranges = <0 1 0 0x8000>;
bcsr13: gpio-controller@d {
#gpio-cells = <2>;
compatible = "fsl,mpc8360mds-bcsr-gpio";
reg = <0xd 1>;
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