Commit afa17a50 authored by Wolfram Sang's avatar Wolfram Sang Committed by David S. Miller
Browse files

net/can: add driver for mscan family & mpc52xx_mscan



Taken from socketcan-svn, fixed remaining todos, cleaned up, tested with a
phyCORE-MPC5200B-IO and a custom board.
Signed-off-by: default avatarWolfram Sang <w.sang@pengutronix.de>
Cc: Wolfgang Grandegger <wg@grandegger.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: David Miller <davem@davemloft.net>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 88880135
......@@ -178,3 +178,12 @@ External interrupts:
external irq3: interrupts = <1 3 n>;
'n' is sense (0: level high, 1: edge rising, 2: edge falling 3: level low)
fsl,mpc5200-mscan nodes
-----------------------
In addition to the required compatible-, reg- and interrupt-properites, you can
also specify which clock shall be used for the bus:
- fsl,mscan-clk-src - a string describing the clock source. Valid values
are "ip" for IP_CLK and "sys" for SYS_XTAL.
"sys" is the default in case the property is not
present.
......@@ -108,6 +108,25 @@ config CAN_MCP251X
---help---
Driver for the Microchip MCP251x SPI CAN controllers.
config CAN_MSCAN
depends on CAN_DEV && (PPC || M68K || M68KNOMMU)
tristate "Support for Freescale MSCAN based chips"
---help---
The Motorola Scalable Controller Area Network (MSCAN) definition
is based on the MSCAN12 definition which is the specific
implementation of the Motorola Scalable CAN concept targeted for
the Motorola MC68HC12 Microcontroller Family.
config CAN_MPC52XX
tristate "Freescale MPC5xxx onboard CAN controller"
depends on CAN_MSCAN && PPC_MPC52xx
---help---
If you say yes here you get support for Freescale's MPC52xx
onboard dualCAN controller.
This driver can also be built as a module. If so, the module
will be called mpc5xxx_can.
config CAN_DEBUG_DEVICES
bool "CAN devices debugging messages"
depends on CAN
......
......@@ -10,6 +10,7 @@ can-dev-y := dev.o
obj-y += usb/
obj-$(CONFIG_CAN_SJA1000) += sja1000/
obj-$(CONFIG_CAN_MSCAN) += mscan/
obj-$(CONFIG_CAN_AT91) += at91_can.o
obj-$(CONFIG_CAN_TI_HECC) += ti_hecc.o
obj-$(CONFIG_CAN_MCP251X) += mcp251x.o
......
obj-$(CONFIG_CAN_MPC52XX) += mscan-mpc52xx.o
mscan-mpc52xx-objs := mscan.o mpc52xx_can.o
ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
/*
* CAN bus driver for the Freescale MPC5xxx embedded CPU.
*
* Copyright (C) 2004-2005 Andrey Volkov <avolkov@varma-el.com>,
* Varma Electronics Oy
* Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com>
* Copyright (C) 2009 Wolfram Sang, Pengutronix <w.sang@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the version 2 of the GNU General Public License
* as published by the Free Software Foundation
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/netdevice.h>
#include <linux/can.h>
#include <linux/can/dev.h>
#include <linux/of_platform.h>
#include <sysdev/fsl_soc.h>
#include <linux/io.h>
#include <asm/mpc52xx.h>
#include "mscan.h"
#define DRV_NAME "mpc5xxx_can"
static struct of_device_id mpc52xx_cdm_ids[] __devinitdata = {
{ .compatible = "fsl,mpc5200-cdm", },
{ .compatible = "fsl,mpc5200b-cdm", },
{}
};
/*
* Get the frequency of the external oscillator clock connected
* to the SYS_XTAL_IN pin, or return 0 if it cannot be determined.
*/
static unsigned int __devinit mpc52xx_can_xtal_freq(struct of_device *of)
{
struct mpc52xx_cdm __iomem *cdm;
struct device_node *np_cdm;
unsigned int freq;
u32 val;
freq = mpc5xxx_get_bus_frequency(of->node);
if (!freq)
return 0;
/*
* Determine SYS_XTAL_IN frequency from the clock domain settings
*/
np_cdm = of_find_matching_node(NULL, mpc52xx_cdm_ids);
if (!np_cdm) {
dev_err(&of->dev, "can't get clock node!\n");
return 0;
}
cdm = of_iomap(np_cdm, 0);
of_node_put(np_cdm);
if (in_8(&cdm->ipb_clk_sel) & 0x1)
freq *= 2;
val = in_be32(&cdm->rstcfg);
if (val & (1 << 5))
freq *= 8;
else
freq *= 4;
if (val & (1 << 6))
freq /= 12;
else
freq /= 16;
iounmap(cdm);
return freq;
}
/*
* Get frequency of the MSCAN clock source
*
* Either the oscillator clock (SYS_XTAL_IN) or the IP bus clock (IP_CLK)
* can be selected. According to the MPC5200 user's manual, the oscillator
* clock is the better choice as it has less jitter but due to a hardware
* bug, it can not be selected for the old MPC5200 Rev. A chips.
*/
static unsigned int __devinit mpc52xx_can_clock_freq(struct of_device *of,
int clock_src)
{
unsigned int pvr;
pvr = mfspr(SPRN_PVR);
if (clock_src == MSCAN_CLKSRC_BUS || pvr == 0x80822011)
return mpc5xxx_get_bus_frequency(of->node);
return mpc52xx_can_xtal_freq(of);
}
static int __devinit mpc5xxx_can_probe(struct of_device *ofdev,
const struct of_device_id *id)
{
struct device_node *np = ofdev->node;
struct net_device *dev;
struct mscan_priv *priv;
void __iomem *base;
const char *clk_src;
int err, irq, clock_src;
base = of_iomap(ofdev->node, 0);
if (!base) {
dev_err(&ofdev->dev, "couldn't ioremap\n");
err = -ENOMEM;
goto exit_release_mem;
}
irq = irq_of_parse_and_map(np, 0);
if (!irq) {
dev_err(&ofdev->dev, "no irq found\n");
err = -ENODEV;
goto exit_unmap_mem;
}
dev = alloc_mscandev();
if (!dev) {
err = -ENOMEM;
goto exit_dispose_irq;
}
priv = netdev_priv(dev);
priv->reg_base = base;
dev->irq = irq;
/*
* Either the oscillator clock (SYS_XTAL_IN) or the IP bus clock
* (IP_CLK) can be selected as MSCAN clock source. According to
* the MPC5200 user's manual, the oscillator clock is the better
* choice as it has less jitter. For this reason, it is selected
* by default.
*/
clk_src = of_get_property(np, "fsl,mscan-clk-src", NULL);
if (clk_src && strcmp(clk_src, "ip") == 0)
clock_src = MSCAN_CLKSRC_BUS;
else
clock_src = MSCAN_CLKSRC_XTAL;
priv->can.clock.freq = mpc52xx_can_clock_freq(ofdev, clock_src);
if (!priv->can.clock.freq) {
dev_err(&ofdev->dev, "couldn't get MSCAN clock frequency\n");
err = -ENODEV;
goto exit_free_mscan;
}
SET_NETDEV_DEV(dev, &ofdev->dev);
err = register_mscandev(dev, clock_src);
if (err) {
dev_err(&ofdev->dev, "registering %s failed (err=%d)\n",
DRV_NAME, err);
goto exit_free_mscan;
}
dev_set_drvdata(&ofdev->dev, dev);
dev_info(&ofdev->dev, "MSCAN at 0x%p, irq %d, clock %d Hz\n",
priv->reg_base, dev->irq, priv->can.clock.freq);
return 0;
exit_free_mscan:
free_candev(dev);
exit_dispose_irq:
irq_dispose_mapping(irq);
exit_unmap_mem:
iounmap(base);
exit_release_mem:
return err;
}
static int __devexit mpc5xxx_can_remove(struct of_device *ofdev)
{
struct net_device *dev = dev_get_drvdata(&ofdev->dev);
struct mscan_priv *priv = netdev_priv(dev);
dev_set_drvdata(&ofdev->dev, NULL);
unregister_mscandev(dev);
iounmap(priv->reg_base);
irq_dispose_mapping(dev->irq);
free_candev(dev);
return 0;
}
#ifdef CONFIG_PM
static struct mscan_regs saved_regs;
static int mpc5xxx_can_suspend(struct of_device *ofdev, pm_message_t state)
{
struct net_device *dev = dev_get_drvdata(&ofdev->dev);
struct mscan_priv *priv = netdev_priv(dev);
struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
_memcpy_fromio(&saved_regs, regs, sizeof(*regs));
return 0;
}
static int mpc5xxx_can_resume(struct of_device *ofdev)
{
struct net_device *dev = dev_get_drvdata(&ofdev->dev);
struct mscan_priv *priv = netdev_priv(dev);
struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
regs->canctl0 |= MSCAN_INITRQ;
while ((regs->canctl1 & MSCAN_INITAK) == 0)
udelay(10);
regs->canctl1 = saved_regs.canctl1;
regs->canbtr0 = saved_regs.canbtr0;
regs->canbtr1 = saved_regs.canbtr1;
regs->canidac = saved_regs.canidac;
/* restore masks, buffers etc. */
_memcpy_toio(&regs->canidar1_0, (void *)&saved_regs.canidar1_0,
sizeof(*regs) - offsetof(struct mscan_regs, canidar1_0));
regs->canctl0 &= ~MSCAN_INITRQ;
regs->cantbsel = saved_regs.cantbsel;
regs->canrier = saved_regs.canrier;
regs->cantier = saved_regs.cantier;
regs->canctl0 = saved_regs.canctl0;
return 0;
}
#endif
static struct of_device_id __devinitdata mpc5xxx_can_table[] = {
{.compatible = "fsl,mpc5200-mscan"},
{.compatible = "fsl,mpc5200b-mscan"},
{},
};
static struct of_platform_driver mpc5xxx_can_driver = {
.owner = THIS_MODULE,
.name = "mpc5xxx_can",
.probe = mpc5xxx_can_probe,
.remove = __devexit_p(mpc5xxx_can_remove),
#ifdef CONFIG_PM
.suspend = mpc5xxx_can_suspend,
.resume = mpc5xxx_can_resume,
#endif
.match_table = mpc5xxx_can_table,
};
static int __init mpc5xxx_can_init(void)
{
return of_register_platform_driver(&mpc5xxx_can_driver);
}
module_init(mpc5xxx_can_init);
static void __exit mpc5xxx_can_exit(void)
{
return of_unregister_platform_driver(&mpc5xxx_can_driver);
};
module_exit(mpc5xxx_can_exit);
MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>");
MODULE_DESCRIPTION("Freescale MPC5200 CAN driver");
MODULE_LICENSE("GPL v2");
/*
* CAN bus driver for the alone generic (as possible as) MSCAN controller.
*
* Copyright (C) 2005-2006 Andrey Volkov <avolkov@varma-el.com>,
* Varma Electronics Oy
* Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com>
* Copytight (C) 2008-2009 Pengutronix <kernel@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the version 2 of the GNU General Public License
* as published by the Free Software Foundation
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/if_arp.h>
#include <linux/if_ether.h>
#include <linux/list.h>
#include <linux/can.h>
#include <linux/can/dev.h>
#include <linux/can/error.h>
#include <linux/io.h>
#include "mscan.h"
#define MSCAN_NORMAL_MODE 0
#define MSCAN_SLEEP_MODE MSCAN_SLPRQ
#define MSCAN_INIT_MODE (MSCAN_INITRQ | MSCAN_SLPRQ)
#define MSCAN_POWEROFF_MODE (MSCAN_CSWAI | MSCAN_SLPRQ)
#define MSCAN_SET_MODE_RETRIES 255
#define MSCAN_ECHO_SKB_MAX 3
#define BTR0_BRP_MASK 0x3f
#define BTR0_SJW_SHIFT 6
#define BTR0_SJW_MASK (0x3 << BTR0_SJW_SHIFT)
#define BTR1_TSEG1_MASK 0xf
#define BTR1_TSEG2_SHIFT 4
#define BTR1_TSEG2_MASK (0x7 << BTR1_TSEG2_SHIFT)
#define BTR1_SAM_SHIFT 7
#define BTR0_SET_BRP(brp) (((brp) - 1) & BTR0_BRP_MASK)
#define BTR0_SET_SJW(sjw) ((((sjw) - 1) << BTR0_SJW_SHIFT) & \
BTR0_SJW_MASK)
#define BTR1_SET_TSEG1(tseg1) (((tseg1) - 1) & BTR1_TSEG1_MASK)
#define BTR1_SET_TSEG2(tseg2) ((((tseg2) - 1) << BTR1_TSEG2_SHIFT) & \
BTR1_TSEG2_MASK)
#define BTR1_SET_SAM(sam) ((sam) ? 1 << BTR1_SAM_SHIFT : 0)
static struct can_bittiming_const mscan_bittiming_const = {
.name = "mscan",
.tseg1_min = 4,
.tseg1_max = 16,
.tseg2_min = 2,
.tseg2_max = 8,
.sjw_max = 4,
.brp_min = 1,
.brp_max = 64,
.brp_inc = 1,
};
struct mscan_state {
u8 mode;
u8 canrier;
u8 cantier;
};
#define F_RX_PROGRESS 0
#define F_TX_PROGRESS 1
#define F_TX_WAIT_ALL 2
static enum can_state state_map[] = {
CAN_STATE_ERROR_ACTIVE,
CAN_STATE_ERROR_WARNING,
CAN_STATE_ERROR_PASSIVE,
CAN_STATE_BUS_OFF
};
static int mscan_set_mode(struct net_device *dev, u8 mode)
{
struct mscan_priv *priv = netdev_priv(dev);
struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
int ret = 0;
int i;
u8 canctl1;
if (mode != MSCAN_NORMAL_MODE) {
if (priv->tx_active) {
/* Abort transfers before going to sleep */#
out_8(&regs->cantarq, priv->tx_active);
/* Suppress TX done interrupts */
out_8(&regs->cantier, 0);
}
canctl1 = in_8(&regs->canctl1);
if ((mode & MSCAN_SLPRQ) && (canctl1 & MSCAN_SLPAK) == 0) {
out_8(&regs->canctl0,
in_8(&regs->canctl0) | MSCAN_SLPRQ);
for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
if (in_8(&regs->canctl1) & MSCAN_SLPAK)
break;
udelay(100);
}
/*
* The mscan controller will fail to enter sleep mode,
* while there are irregular activities on bus, like
* somebody keeps retransmitting. This behavior is
* undocumented and seems to differ between mscan built
* in mpc5200b and mpc5200. We proceed in that case,
* since otherwise the slprq will be kept set and the
* controller will get stuck. NOTE: INITRQ or CSWAI
* will abort all active transmit actions, if still
* any, at once.
*/
if (i >= MSCAN_SET_MODE_RETRIES)
dev_dbg(dev->dev.parent,
"device failed to enter sleep mode. "
"We proceed anyhow.\n");
else
priv->can.state = CAN_STATE_SLEEPING;
}
if ((mode & MSCAN_INITRQ) && (canctl1 & MSCAN_INITAK) == 0) {
out_8(&regs->canctl0,
in_8(&regs->canctl0) | MSCAN_INITRQ);
for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
if (in_8(&regs->canctl1) & MSCAN_INITAK)
break;
}
if (i >= MSCAN_SET_MODE_RETRIES)
ret = -ENODEV;
}
if (!ret)
priv->can.state = CAN_STATE_STOPPED;
if (mode & MSCAN_CSWAI)
out_8(&regs->canctl0,
in_8(&regs->canctl0) | MSCAN_CSWAI);
} else {
canctl1 = in_8(&regs->canctl1);
if (canctl1 & (MSCAN_SLPAK | MSCAN_INITAK)) {
out_8(&regs->canctl0, in_8(&regs->canctl0) &
~(MSCAN_SLPRQ | MSCAN_INITRQ));
for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
canctl1 = in_8(&regs->canctl1);
if (!(canctl1 & (MSCAN_INITAK | MSCAN_SLPAK)))
break;
}
if (i >= MSCAN_SET_MODE_RETRIES)
ret = -ENODEV;
else
priv->can.state = CAN_STATE_ERROR_ACTIVE;
}
}
return ret;
}
static int mscan_start(struct net_device *dev)
{
struct mscan_priv *priv = netdev_priv(dev);
struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
u8 canrflg;
int err;
out_8(&regs->canrier, 0);
INIT_LIST_HEAD(&priv->tx_head);
priv->prev_buf_id = 0;
priv->cur_pri = 0;
priv->tx_active = 0;
priv->shadow_canrier = 0;
priv->flags = 0;
err = mscan_set_mode(dev, MSCAN_NORMAL_MODE);
if (err)
return err;
canrflg = in_8(&regs->canrflg);
priv->shadow_statflg = canrflg & MSCAN_STAT_MSK;
priv->can.state = state_map[max(MSCAN_STATE_RX(canrflg),
MSCAN_STATE_TX(canrflg))];
out_8(&regs->cantier, 0);
/* Enable receive interrupts. */
out_8(&regs->canrier, MSCAN_OVRIE | MSCAN_RXFIE | MSCAN_CSCIE |
MSCAN_RSTATE1 | MSCAN_RSTATE0 | MSCAN_TSTATE1 | MSCAN_TSTATE0);
return 0;
}
static netdev_tx_t mscan_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
struct can_frame *frame = (struct can_frame *)skb->data;
struct mscan_priv *priv = netdev_priv(dev);
struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
int i, rtr, buf_id;
u32 can_id;
if (frame->can_dlc > 8)
return -EINVAL;
out_8(&regs->cantier, 0);
i = ~priv->tx_active & MSCAN_TXE;
buf_id = ffs(i) - 1;
switch (hweight8(i)) {
case 0:
netif_stop_queue(dev);
dev_err(dev->dev.parent, "Tx Ring full when queue awake!\n");
return NETDEV_TX_BUSY;
case 1:
/*
* if buf_id < 3, then current frame will be send out of order,
* since buffer with lower id have higher priority (hell..)
*/
netif_stop_queue(dev);
case 2:
if (buf_id < priv->prev_buf_id) {
priv->cur_pri++;
if (priv->cur_pri == 0xff) {
set_bit(F_TX_WAIT_ALL, &priv->flags);
netif_stop_queue(dev);
}
}
set_bit(F_TX_PROGRESS, &priv->flags);
break;
}
priv->prev_buf_id = buf_id;
out_8(&regs->cantbsel, i);
rtr = frame->can_id & CAN_RTR_FLAG;
if (frame->can_id & CAN_EFF_FLAG) {
can_id = (frame->can_id & CAN_EFF_MASK) << 1;
if (rtr)
can_id |= 1;
out_be16(&regs->tx.idr3_2, can_id);
can_id >>= 16;
can_id = (can_id & 0x7) | ((can_id << 2) & 0xffe0) | (3 << 3);
} else {
can_id = (frame->can_id & CAN_SFF_MASK) << 5;
if (rtr)
can_id |= 1 << 4;
}
out_be16(&regs->tx.idr1_0, can_id);
if (!rtr) {
void __iomem *data = &regs->tx.dsr1_0;
u16 *payload = (u16 *) frame->data;
/* It is safe to write into dsr[dlc+1] */
for (i = 0; i < (frame->can_dlc + 1) / 2; i++) {
out_be16(data, *payload++);
data += 2 + _MSCAN_RESERVED_DSR_SIZE;
}
}
out_8(&regs->tx.dlr, frame->can_dlc);
out_8(&regs->tx.tbpr, priv->cur_pri);
/* Start transmission. */
out_8(&regs->cantflg, 1 << buf_id);
if (!test_bit(F_TX_PROGRESS, &priv->flags))
dev->trans_start = jiffies;
list_add_tail(&priv->tx_queue[buf_id].list, &priv->tx_head);
can_put_echo_skb(skb, dev, buf_id);