1. 22 Jul, 2015 7 commits
  2. 20 Jul, 2015 1 commit
  3. 19 Jul, 2015 2 commits
  4. 18 Jul, 2015 2 commits
  5. 17 Jul, 2015 20 commits
  6. 16 Jul, 2015 3 commits
    • Murali Karicheri's avatar
      ARM: keystone: dts: rename pcie nodes to help override status · 8b4769cc
      Murali Karicheri authored
      Now that PCIe DT binding is disabled in SoC specific DTS,
      we need a way to override it in a board specific DTS. So
      rename the PCIe nodes accordingly.
      Signed-off-by: default avatarMurali Karicheri <m-karicheri2@ti.com>
      Signed-off-by: default avatarSantosh Shilimkar <ssantosh@kernel.org>
    • Murali Karicheri's avatar
      ARM: keystone: dts: fix dt bindings for PCIe · 9dd4f28f
      Murali Karicheri authored
      Currently PCIe DT bindings are broken. PCIe driver can't function
      without having a SerDes driver that provide the phy configuration.
      On K2E EVM, this causes problem since the EVM has Marvell SATA
      controller present and with default values in the SerDes register,
      it seems to pass the PCIe link check, but causes issues since
      the configuration is not correct. The manifestation is that when
      EVM is booted with NFS rootfs, the boot hangs. We shouldn't enable
      PCIe on this EVM since to work, SerDes driver has to be present as
      well. So by default, the PCIe DT binding should be disabled in SoC
      specific DTS. It can be enabled in the board specific DTS when the
      SerDes device driver is also present.
      So fix the status of PCIe DT bindings in the SoC specific DTS to
      "disabled". To enable PCIe, the status should be set to "ok" in
      the EVM DTS file when SerDes driver support becomes available in
      the upstream tree.
      Signed-off-by: default avatarMurali Karicheri <m-karicheri2@ti.com>
      Signed-off-by: default avatarSantosh Shilimkar <ssantosh@kernel.org>
    • Robert Jarzmik's avatar
      ARM: pxa: fix dm9000 platform data regression · a927ef89
      Robert Jarzmik authored
      Since dm9000 driver added support for a vcc regulator, platform data
      based platforms have their ethernet broken, as the regulator claiming
      returns -EPROBE_DEFER and prevents dm9000 loading.
      This patch fixes this for all pxa boards using dm9000, by using the
      specific regulator_has_full_constraints() function.
      This was discovered and tested on the cm-x300 board.
      Fixes: 7994fe55 ("dm9000: Add regulator and reset support to dm9000")
      Signed-off-by: default avatarRobert Jarzmik <robert.jarzmik@free.fr>
      Acked-by: default avatarIgor Grinberg <grinberg@compulab.co.il>
  7. 15 Jul, 2015 3 commits
    • Adam YH Lee's avatar
      ARM: dts: Correct audio input route & set mic bias for am335x-pepper · 9908ac3d
      Adam YH Lee authored
      Audio-in was incorrectly routed to Line In. It should be Mic3L as per
      Using mic-bias voltage at 2.0v (<0x1>) does not work for some reason. There
      is no voltage seen on micbias (R127). Mic-bias voltage of 2.5v (<0x2>) works.
      I see voltage of 2.475v across GND and micbias.
      With these changes, I can record audio with a pair of proliferate TRRS earbuds.
      Signed-off-by: default avatarAdam YH Lee <adam.yh.lee@gmail.com>
      Acked-by: default avatarAsh Charles <ashcharles@gmail.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
    • Dave Gerlach's avatar
      ARM: OMAP2+: Add HAVE_ARM_SCU for AM43XX · f87d089d
      Dave Gerlach authored
      CONFIG_HAVE_ARM_SCU only gets selected if CONFIG_SMP is selected in an OMAP
      system, however AM43XX needs this option regardless of CONFIG_SMP and also
      for an AM43XX only build as it is important for controlling power in the SoC.
      Without this we cannot suspend the CPU for SoC suspend or cpuidle. The
      ARM Cortex A9 needs SCU CPU Power Status bits to be set to off mode in order
      for the PRCM to transition the MPU to low power modes.
      Signed-off-by: default avatarDave Gerlach <d-gerlach@ti.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
    • Thomas Gleixner's avatar
      genirq: Revert sparse irq locking around __cpu_up() and move it to x86 for now · ce0d3c0a
      Thomas Gleixner authored
      Boris reported that the sparse_irq protection around __cpu_up() in the
      generic code causes a regression on Xen. Xen allocates interrupts and
      some more in the xen_cpu_up() function, so it deadlocks on the
      There is no simple fix for this and we really should have the
      protection for all architectures, but for now the only solution is to
      move it to x86 where actual wreckage due to the lack of protection has
      been observed.
      Reported-and-tested-by: default avatarBoris Ostrovsky <boris.ostrovsky@oracle.com>
      Fixes: a8994181 'hotplug: Prevent alloc/free of irq descriptors during cpu up/down'
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: xiao jin <jin.xiao@intel.com>
      Cc: Joerg Roedel <jroedel@suse.de>
      Cc: Borislav Petkov <bp@suse.de>
      Cc: Yanmin Zhang <yanmin_zhang@linux.intel.com>
      Cc: xen-devel <xen-devel@lists.xenproject.org>
  8. 14 Jul, 2015 2 commits
    • Ralf Baechle's avatar
      MIPS: SB1: Remove support for Pass 1 parts. · dd0bc75e
      Ralf Baechle authored
      Pass 1 parts had a number of significant erratas and were only available
      in small numbers and under NDA.  Full support also required the use of a
      special toolchain that kept branches properly aligned.  These workarounds
      were never upstreamed and the only toolchain known to have them is
      Montavista's GCC 3.0-based toolchain which completly obsoleted if not
      useless these days.
      So now that automated testing has tripped over the user of the
      -msb1-pass1-workarounds option, rather than fixing it remove support for
      pass 1 parts.
      Probably nobody will notice.  I seem to own the last know pass 1 board
      and I haven't noticed another one in the wild in the past decade, at
      Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
    • Paul Burton's avatar
      MIPS: Require O32 FP64 support for MIPS64 with O32 compat · 4e9d324d
      Paul Burton authored
      MIPS32r6 code requires FP64 (ie. FR=1) support. Building a kernel with
      support for MIPS32r6 binaries but without support for O32 with FP64 is
      therefore a problem which can lead to incorrectly executed userland.
      CONFIG_MIPS_O32_FP64_SUPPORT is already selected when the kernel is
      configured for MIPS32r6, but not when the kernel is configured for
      MIPS64r6 with O32 compat support. Select CONFIG_MIPS_O32_FP64_SUPPORT in
      such configurations to prevent building kernels which execute MIPS32r6
      userland incorrectly.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Cc: Markos Chandras <markos.chandras@imgtec.com>
      Cc: <stable@vger.kernel.org> # v4.0-
      Cc: linux-mips@linux-mips.org
      Cc: Matthew Fortune <matthew.fortune@imgtec.com>
      Cc: stable@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/10674/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>