- 12 Jan, 2006 26 commits
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Jason Uhlenkott authored
It looks like the new scalable TLB flush code for x86_64 is claiming one more IRQ vector than it actually uses. Signed-off-by:
Jason Uhlenkott <jasonuhl@sgi.com> Signed-off-by:
Andi Kleen <ak@suse.de> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Ravikiran G Thirumalai authored
Patch uses a static PDA array early at boot and reallocates processor PDA with node local memory when kmalloc is ready, just before pda_init. The boot_cpu_pda is needed since the cpu_pda is used even before pda_init for that cpu is called (to set the static per-cpu areas offset table etc) Signed-off-by:
Ravikiran Thirumalai <kiran@scalex86.org> Signed-off-by:
Shai Fultheim <shai@scalex86.org> Signed-off-by:
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Ravikiran G Thirumalai authored
Helper patch to change cpu_pda users to use macros to access cpu_pda instead of the cpu_pda[] array. Signed-off-by:
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Ravikiran Thirumalai authored
Patch enables early intialization of cpu_to_node. apicid_to_node is built by reading the SRAT table, from acpi_numa_init with ACPI_NUMA and k8_scan_nodes with K8_NUMA. x86_cpu_to_apicid is built by parsing the ACPI MADT table, from acpi_boot_init. We combine these two tables and setup cpu_to_node. Early intialization helps the static per_cpu_areas in getting pages from correct node. Change since last release: Do not initialize early init_cpu_to_node for faking node cases. Patch tested on TYAN dual core 4P board with K8 only, ACPI_NUMA. Tested on EM64T NUMA. Also tested with numa=off, numa=fake, and running a kernel compiled with NUMA on a regular EM64 2 way SMP. Signed-off-by:
Alok N Kataria <alokk@calsoftinc.com> Signed-off-by:
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Andi Kleen authored
RDTSC serialization using cpuid is not needed for Intel platforms. This increases gettimeofday performance. Cc: vojtech@suse.cz Cc: rohit.seth@intel.com Signed-off-by:
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Andi Kleen authored
Needed for follow on patches Signed-off-by:
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Andi Kleen authored
They already do this in hardware and the Linux algorithm actually adds errors. Cc: mingo@elte.hu Cc: rohit.seth@intel.com Signed-off-by:
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Andi Kleen authored
cpumask.h wasn't included implicitely into proto.h in this case. Just move it over to smp.h Signed-off-by:
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Vivek Goyal authored
o Apic id is in most significant 8 bits of APIC_ID register. Current code is trying to write apic id to least significant 8 bits. This patch fixes it. o This fix enables booting uni kdump capture kernel on a cpu with non-zero apic id. Signed-off-by:
Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by:
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Andi Kleen authored
This function is never used for x86_64. Signed-off-by:
Brian Gerst <bgerst@didntduck.org> Signed-off-by:
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Muli Ben-Yehuda authored
AK: I hacked Muli's original patch a lot and there were a lot of changes - all bugs are probably to blame on me now. There were also some changes in the fall back behaviour for swiotlb - in particular it doesn't try to use GFP_DMA now anymore. Also all DMA mapping operations use the same core dma_alloc_coherent code with proper fallbacks now. And various other changes and cleanups. Known problems: iommu=force swiotlb=force together breaks needs more testing. This patch cleans up x86_64's DMA mapping dispatching code. Right now we have three possible IOMMU types: AGP GART, swiotlb and nommu, and in the future we will also have Xen's x86_64 swiotlb and other HW IOMMUs for x86_64. In order to support all of them cleanly, this patch: - introduces a struct dma_mapping_ops with function pointers for each of the DMA mapping operations of gart (AMD HW IOMMU), swiotlb (software IOMMU) and nommu (no IOMMU). - gets rid of: if (swiotlb) return swiotlb_xxx(); - PCI_DMA_BUS_IS_PHYS is now checked against the dma_ops being set This makes swiotlb faster by avoiding double copying in some cases. Signed-Off-By:Muli Ben-Yehuda <mulix@mulix.org> Signed-Off-By:
Jon D. Mason <jdmason@us.ibm.com> Signed-off-by:
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Andi Kleen authored
This adds a new notifier chain that is called with IDLE_START when a CPU goes idle and IDLE_END when it goes out of idle. The context can be idle thread or interrupt context. Since we cannot rely on MONITOR/MWAIT existing the idle end check currently has to be done in all interrupt handlers. They were originally inspired by the similar s390 implementation. They have a variety of applications: - They will be needed for CONFIG_NO_IDLE_HZ - They can be used for oprofile to fix up the missing time in idle when performance counters don't tick. - They can be used for better C state management in ACPI - They could be used for microstate accounting. This is just infrastructure so far, no users. Signed-off-by:
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Venkatesh Pallipadi authored
Whenever we see that a CPU is capable of C3 (during ACPI cstate init), we disable local APIC timer and switch to using a broadcast from external timer interrupt (IRQ 0). Patch below adds the code for x86_64. Signed-off-by:
Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by:
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Adrian Bunk authored
Signed-off-by:
Adrian Bunk <bunk@stusta.de> Signed-off-by:
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Andi Kleen authored
By setting a flag during a 32bit system call only Signed-off-by:
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Ravikiran G Thirumalai authored
This patch is on the same lines as Zachary Amsden's i386 GDT page alignemnt patch in -mm, but for x86_64. Patch to align and pad x86_64 GDT on page boundries. [AK: some minor cleanups and fixed incorrect TLS initialization in CPU init.] Signed-off-by:
Nippun Goel <nippung@calsoftinc.com> Signed-off-by:
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Jan Beulich authored
The separation of the rex64 prefix (on fxsave/fxrstor) by way of using a semicolon resulted in the prefix not always taking effect (because when extended registers are needed for addressing, another rex prefix would have been generated by the compiler), thus (depending on the build) resulting in eventually getting 32-bit saves and/or restores. Signed-Off-By:
Jan Beulich <jbeulich@novell.com> Signed-off-by:
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Andi Kleen authored
Some people need it now on 64bit so reuse the i386 code for x86-64. This will be also useful for future bug workarounds. It is a bit simplified there because there is no need to do it very early on x86-64. This means it doesn't need early ioremap et.al. We run it as a core initcall right now. I hope it's not needed for early setup. I added a general CONFIG_DMI symbol in case IA64 or someone else wants to reuse the code later too. Signed-off-by:
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Stephen Hemminger authored
Use single instruction for find largest set bit on x86_64. [Updated by Jan Beulich to fix wrong asm constraints in original patch -AK] Cc: jbeulich@novell.com Signed-off-by:
Stephen Hemminger <shemminger@osdl.org> Signed-off-by:
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Benjamin LaHaise authored
As discussed, the flags register on x86-64 is saved and restored by the assembly code which sets up struct pt_regs, so we do not need to save and restore it in the inline assembler which already informs gcc that we're clobbering the flags. This patch has been sanity booted and works okay here. Signed-off-by:
Benjamin LaHaise <benjamin.c.lahaise@intel.com> Signed-off-by:
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Jan Beulich authored
This - switches the INT3 handler to run on an IST stack (to cope with breakpoints set by a kernel debugger on places where the kernel's %gs base hasn't been set up, yet); the IST stack used is shared with the INT1 handler's [AK: this also allows setting a kprobe on the interrupt/exception entry points] - allows nesting of INT1/INT3 handlers so that one can, with a kernel debugger, debug (at least) the user-mode portions of the INT1/INT3 handling; the nesting isn't actively enabled here since a kernel- debugger-free kernel doesn't need it Signed-Off-By:
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Andi Kleen authored
Was only used by the floppy driver to work around some ancient hardware bug that should never occur on any 64bit system. Signed-off-by:
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Andi Kleen authored
Noticed by Andreas Schwab Signed-off-by:
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Jan Beulich authored
This adjusts things so that handlers of the die() notifier will have sufficient information about the trap currently being handled. It also adjusts the notify_die() prototype to (again) match that of i386. Signed-off-by:
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Jan Beulich authored
As a follow-up to the introduction of CONFIG_UNWIND_INFO, this separates the generation of frame unwind information for x86-64 from that of full debug information. Signed-off-by:
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Jan Beulich authored
Frame unwind information was still incorrect for ia32_ptregs_common (sorry, my fault), and could be improved for some of the other entry points. Signed-Off-By:
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- 11 Jan, 2006 1 commit
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Linus Torvalds authored
Noticed by Arjan originally on x86-64, then Ingo on x86, and finally me grepping for it in the generic version. Bad parenthesis nesting. Signed-off-by:
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- 10 Jan, 2006 7 commits
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Ananth N Mavinakayanahalli authored
The following patch (against 2.6.15-rc5-mm3) fixes a kprobes build break due to changes introduced in the kprobe locking in 2.6.15-rc5-mm3. In addition, the patch reverts back the open-coding of kprobe_mutex. Signed-off-by:
Ananth N Mavinakayanahalli <ananth@in.ibm.com> Acked-by:
Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
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Anil S Keshavamurthy authored
Currently arch_remove_kprobes() is only implemented/required for x86_64 and powerpc. All other architecture like IA64, i386 and sparc64 implementes a dummy function which is being called from arch independent kprobes.c file. This patch removes the dummy functions and replaces it with #define arch_remove_kprobe(p, s) do { } while(0) Signed-off-by: -
Anil S Keshavamurthy authored
Kernel/kprobes.c defines get_insn_slot() and free_insn_slot() which are currently required _only_ for x86_64 and powerpc (which has no-exec support). FYI, get{free}_insn_slot() functions manages the memory page which is mapped as executable, required for instruction emulation. This patch moves those two functions under __ARCH_WANT_KPROBES_INSN_SLOT and defines __ARCH_WANT_KPROBES_INSN_SLOT in arch specific kprobes.h file. Signed-off-by: -
Brian Gerst authored
Most arches copied the i386 ioctl.h. Combine them into a generic header. Signed-off-by:
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Vivek Goyal authored
- Saving the cpu registers of all cpus before booting in to the crash kernel. - crash_setup_regs will save the registers of the cpu on which panic has occured. One of the concerns ppc64 folks raised is that after capturing the register states, one should not pop the current call frame and push new one. Hence it has been inlined. More call frames later get pushed on to stack (machine_crash_shutdown() and machine_kexec()), but one will not want to backtrace those. - Not very sure about the CFI annotations. With this patch I am getting decent backtrace with gdb. Assuming, compiler has generated enough debugging information for crash_kexec(). Coding crash_setup_regs() in pure assembly makes it tricky because then it can not be inlined and we don't want to return back after capturing register states we don't want to pop this call frame. - Saving the non-panicing cpus registers will be done in the NMI handler while shooting down them in machine_crash_shutdown. - Introducing CRASH_DUMP option in Kconfig for x86_64. Signed-off-by:
Murali M Chakravarthy <muralim@in.ibm.com> Signed-off-by:
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akpm@osdl.org authored
) From: Vivek Goyal <vgoyal@in.ibm.com> - This patch introduces the memmap option for x86_64 similar to i386. - memmap=exactmap enables setting of an exact E820 memory map, as specified by the user. Changes in this version: - Used e820_end_of_ram() to find the max_pfn as suggested by Andi kleen. - removed PFN_UP & PFN_DOWN macros - Printing the user defined map also. Signed-off-by:
Hariprasad Nellitheertha <nharipra@gmail.com> Signed-off-by:
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Vivek Goyal authored
- In case of system crash, current state of cpu registers is saved in memory in elf note format. So far memory for storing elf notes was being allocated statically for NR_CPUS. - This patch introduces dynamic allocation of memory for storing elf notes. It uses alloc_percpu() interface. This should lead to better memory usage. - Introduced based on Andi Kleen's and Eric W. Biederman's suggestions. - This patch also moves memory allocation for elf notes from architecture dependent portion to architecture independent portion. Now crash_notes is architecture independent. The whole idea is that size of memory to be allocated per cpu (MAX_NOTE_BYTES) can be architecture dependent and allocation of this memory can be architecture independent. Signed-off-by:
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- 09 Jan, 2006 4 commits
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Ingo Molnar authored
add the x86_64 version of mutex.h, optimized in assembly. Signed-off-by:
Ingo Molnar <mingo@elte.hu> Signed-off-by:
Arjan van de Ven <arjan@infradead.org>
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Ingo Molnar authored
add atomic_xchg() to all the architectures. Needed by the new mutex code. Signed-off-by:
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Ravikiran G Thirumalai authored
Kill L1_CACHE_SHIFT from all arches. Since L1_CACHE_SHIFT_MAX is not used anymore with the introduction of INTERNODE_CACHE, kill L1_CACHE_SHIFT_MAX. Signed-off-by:
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Christoph Lameter authored
sys_migrate_pages implementation using swap based page migration This is the original API proposed by Ray Bryant in his posts during the first half of 2005 on linux-mm@kvack.org and linux-kernel@vger.kernel.org. The intent of sys_migrate is to migrate memory of a process. A process may have migrated to another node. Memory was allocated optimally for the prior context. sys_migrate_pages allows to shift the memory to the new node. sys_migrate_pages is also useful if the processes available memory nodes have changed through cpuset operations to manually move the processes memory. Paul Jackson is working on an automated mechanism that will allow an automatic migration if the cpuset of a process is changed. However, a user may decide to manually control the migration. This implementation is put into the policy layer since it uses concepts and functions that are also needed for mbind and friends. The patch also provides a do_migrate_pages function that may be useful for cpusets to automatically move memory. sys_migrate_pages does not modify policies in contrast to Ray's implementation. The current code here is based on the swap based page migration capability and thus is not able to preserve the physical layout relative to it containing nodeset (which may be a cpuset). When direct page migration becomes available then the implementation needs to be changed to do a isomorphic move of pages between different nodesets. The current implementation simply evicts all pages in source nodeset that are not in the target nodeset. Patch supports ia64, i386 and x86_64. Signed-off-by:
Christoph Lameter <clameter@sgi.com> Signed-off-by:
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- 06 Jan, 2006 2 commits
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Shaohua Li authored
With physical CPU hotplug, the CPU is hot removed and it should not receive any interrupts. Disabling interrupt is much safer. This basically is what we do in ia64 & x86. Signed-off-by:
Shaohua Li <shaohua.li@intel.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by:
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Brian Gerst authored
GCC 4.1 gives the following warning: include/asm/mpspec.h:79: warning: `packed' attribute ignored for field of type `unsigned char' The packed attribute isn't really necessary anyways so just remove it. Signed-off-by:
Dave Jones <davej@codemonkey.org.uk> Cc: Andi Kleen <ak@muc.de> Signed-off-by:
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