1. 08 Sep, 2008 1 commit
    • Manfred Spraul's avatar
      kernel/cpu.c: create a CPU_STARTING cpu_chain notifier · e545a614
      Manfred Spraul authored
      
      
      Right now, there is no notifier that is called on a new cpu, before the new
      cpu begins processing interrupts/softirqs.
      Various kernel function would need that notification, e.g. kvm works around
      by calling smp_call_function_single(), rcu polls cpu_online_map.
      
      The patch adds a CPU_STARTING notification. It also adds a helper function
      that sends the message to all cpu_chain handlers.
      
      Tested on x86-64.
      All other archs are untested. Especially on sparc, I'm not sure if I got
      it right.
      Signed-off-by: default avatarManfred Spraul <manfred@colorfullife.com>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      e545a614
  2. 21 Aug, 2008 1 commit
  3. 22 Jul, 2008 1 commit
    • Andi Kleen's avatar
      sysdev: Pass the attribute to the low level sysdev show/store function · 4a0b2b4d
      Andi Kleen authored
      
      
      This allow to dynamically generate attributes and share show/store
      functions between attributes. Right now most attributes are generated
      by special macros and lots of duplicated code. With the attribute
      passed it's instead possible to attach some data to the attribute
      and then use that in shared low level functions to do different things.
      
      I need this for the dynamically generated bank attributes in the x86
      machine check code, but it'll allow some further cleanups.
      
      I converted all users in tree to the new show/store prototype. It's a single
      huge patch to avoid unbisectable sections.
      
      Runtime tested: x86-32, x86-64
      Compiled only: ia64, powerpc
      Not compile tested/only grep converted: sh, arm, avr32
      Signed-off-by: default avatarAndi Kleen <ak@linux.intel.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
      4a0b2b4d
  4. 26 Jun, 2008 2 commits
  5. 10 Jun, 2008 1 commit
  6. 30 May, 2008 1 commit
    • Heiko Carstens's avatar
      [S390] Fix section mismatch warnings. · 67060d9c
      Heiko Carstens authored
      This fixes the last remaining section mismatch warnings in s390
      architecture code. It reveals also a real bug introduced by... me
      with git commit 2069e978
      
      
      ("[S390] sparsemem vmemmap: initialize memmap.")
      
      Calling the generic vmemmap_alloc_block() function to get initialized
      memory is a nice idea, however that function is __meminit annotated
      and therefore the function might be gone if we try to call it later.
      This can happen if a DCSS segment gets added.
      
      So basically revert the patch and clear the memmap explicitly to fix
      the original bug.
      Signed-off-by: default avatarHeiko Carstens <heiko.carstens@de.ibm.com>
      Signed-off-by: default avatarMartin Schwidefsky <schwidefsky@de.ibm.com>
      67060d9c
  7. 15 May, 2008 1 commit
  8. 30 Apr, 2008 2 commits
  9. 17 Apr, 2008 4 commits
    • Heiko Carstens's avatar
      [S390] Fix a lot of sparse warnings. · a806170e
      Heiko Carstens authored
      
      
      Most noteable part of this commit is the new local header file entry.h
      which contains all the function declarations of functions that get only
      called from asm code or are arch internal. That way we can avoid extern
      declarations in C files.
      This is more or less the same that was done for sparc64.
      Signed-off-by: default avatarMartin Schwidefsky <schwidefsky@de.ibm.com>
      Signed-off-by: default avatarHeiko Carstens <heiko.carstens@de.ibm.com>
      a806170e
    • Heiko Carstens's avatar
      [S390] Convert monitor calls to function calls. · 43ca5c3a
      Heiko Carstens authored
      
      
      Remove the program check generating monitor calls and use function
      calls instead. Theres is no real advantage in using monitor calls,
      but they do make debugging harder, because of all the program checks
      it generates.
      Signed-off-by: default avatarMartin Schwidefsky <schwidefsky@de.ibm.com>
      Signed-off-by: default avatarHeiko Carstens <heiko.carstens@de.ibm.com>
      43ca5c3a
    • Heiko Carstens's avatar
      [S390] Vertical cpu management. · c10fde0d
      Heiko Carstens authored
      
      
      If vertical cpu polarization is active then the hypervisor will
      dispatch certain cpus for a longer time than other cpus for maximum
      performance. For example if a guest would have three virtual cpus,
      each of them with a share of 33 percent, then in case of vertical
      cpu polarization all of the processing time would be combined to a
      single cpu which would run all the time, while the other two cpus
      would get nearly no cpu time.
      
      There are three different types of vertical cpus: high, medium and
      low. Low cpus hardly get any real cpu time, while high cpus get a
      full real cpu. Medium cpus get something in between.
      
      In order to switch between the two possible modes (default is
      horizontal) a 0 for horizontal polarization or a 1 for vertical
      polarization must be written to the dispatching sysfs attribute:
      
      /sys/devices/system/cpu/dispatching
      
      The polarization of each single cpu can be figured out by the
      polarization sysfs attribute of each cpu:
      
      /sys/devices/system/cpu/cpuX/polarization
      
      horizontal, vertical:high, vertical:medium, vertical:low or unknown.
      
      When switching polarization the polarization attribute may contain
      the value unknown until the configuration change is done and the
      kernel has figured out the new polarization of each cpu.
      
      Note that running a system with different types of vertical cpus may
      result in significant performance regressions. If possible only one
      type of vertical cpus should be used. All other cpus should be
      offlined.
      Signed-off-by: default avatarMartin Schwidefsky <schwidefsky@de.ibm.com>
      Signed-off-by: default avatarHeiko Carstens <heiko.carstens@de.ibm.com>
      c10fde0d
    • Heiko Carstens's avatar
      [S390] cpu topology support for s390. · dbd70fb4
      Heiko Carstens authored
      
      
      Add s390 backend so we can give the scheduler some hints about the
      cpu topology.
      Signed-off-by: default avatarMartin Schwidefsky <schwidefsky@de.ibm.com>
      Signed-off-by: default avatarHeiko Carstens <heiko.carstens@de.ibm.com>
      dbd70fb4
  10. 05 Mar, 2008 1 commit
  11. 19 Feb, 2008 1 commit
  12. 05 Feb, 2008 2 commits
  13. 26 Jan, 2008 6 commits
  14. 20 Nov, 2007 1 commit
  15. 05 Nov, 2007 1 commit
  16. 22 Oct, 2007 2 commits
    • Martin Schwidefsky's avatar
      [S390] tlb flush fix. · ba8a9229
      Martin Schwidefsky authored
      
      
      The current tlb flushing code for page table entries violates the
      s390 architecture in a small detail. The relevant section from the
      principles of operation (SA22-7832-02 page 3-47):
      
         "A valid table entry must not be changed while it is attached
         to any CPU and may be used for translation by that CPU except to
         (1) invalidate the entry by using INVALIDATE PAGE TABLE ENTRY or
         INVALIDATE DAT TABLE ENTRY, (2) alter bits 56-63 of a page-table
         entry, or (3) make a change by means of a COMPARE AND SWAP AND
         PURGE instruction that purges the TLB."
      
      That means if one thread of a multithreaded applciation uses a vma
      while another thread does an unmap on it, the page table entries of
      that vma needs to get removed with IPTE, IDTE or CSP. In some strange
      and rare situations a cpu could check-stop (die) because a entry has
      been pushed out of the TLB that is still needed to complete a
      (milli-coded) instruction. I've never seen it happen with the current
      code on any of the supported machines, so right now this is a
      theoretical problem. But I want to fix it nevertheless, to avoid
      headaches in the futures.
      
      To get this implemented correctly without changing common code the
      primitives ptep_get_and_clear, ptep_get_and_clear_full and
      ptep_set_wrprotect need to use the IPTE instruction to invalidate the
      pte before the new pte value gets stored. If IPTE is always used for
      the three primitives three important operations will have a performace
      hit: fork, mprotect and exit_mmap. Time for some workarounds:
      
      * 1: ptep_get_and_clear_full is used in unmap_vmas to remove page
      tables entries in a batched tlb gather operation. If the mmu_gather
      context passed to unmap_vmas has been started with full_mm_flush==1
      or if only one cpu is online or if the only user of a mm_struct is the
      current process then the fullmm indication in the mmu_gather context is
      set to one. All TLBs for mm_struct are flushed by the tlb_gather_mmu
      call. No new TLBs can be created while the unmap is in progress. In
      this case ptep_get_and_clear_full clears the ptes with a simple store.
      
      * 2: ptep_get_and_clear is used in change_protection to clear the
      ptes from the page tables before they are reentered with the new
      access flags. At the end of the update flush_tlb_range clears the
      remaining TLBs. In general the ptep_get_and_clear has to issue IPTE
      for each pte and flush_tlb_range is a nop. But if there is only one
      user of the mm_struct then ptep_get_and_clear uses simple stores
      to do the update and flush_tlb_range will flush the TLBs.
      
      * 3: Similar to 2, ptep_set_wrprotect is used in copy_page_range
      for a fork to make all ptes of a cow mapping read-only. At the end of
      of copy_page_range dup_mmap will flush the TLBs with a call to
      flush_tlb_mm.  Check for mm->mm_users and if there is only one user
      avoid using IPTE in ptep_set_wrprotect and let flush_tlb_mm clear the
      TLBs.
      
      Overall for single threaded programs the tlb flush code now performs
      better, for multi threaded programs it is slightly worse. In particular
      exit_mmap() now does a single IDTE for the mm and then just frees every
      page cache reference and every page table page directly without a delay
      over the mmu_gather structure.
      Signed-off-by: default avatarMartin Schwidefsky <schwidefsky@de.ibm.com>
      ba8a9229
    • Heiko Carstens's avatar
      [S390] Add per-cpu idle time / idle count sysfs attributes. · fae8b22d
      Heiko Carstens authored
      
      
      Add two new sysfs entries per cpu: idle_count and idle_time.
      idle_count contains the number of times a cpu went into idle state.
      idle_time contains the time a cpu spent in idle state in microseconds.
      This can be used e.g. by powertop to tell how often idle state is
      entered and left.
      
      # cat /sys/devices/system/cpu/cpu0/idle_count
      504
      # cat /sys/devices/system/cpu/cpu0/idle_time
      469734037 us
      
      Cc: Arjan van de Ven <arjan@infradead.org>
      Signed-off-by: default avatarHeiko Carstens <heiko.carstens@de.ibm.com>
      Signed-off-by: default avatarMartin Schwidefsky <schwidefsky@de.ibm.com>
      fae8b22d
  17. 30 Jul, 2007 1 commit
    • Alexey Dobriyan's avatar
      Remove fs.h from mm.h · 4e950f6f
      Alexey Dobriyan authored
      
      
      Remove fs.h from mm.h. For this,
       1) Uninline vma_wants_writenotify(). It's pretty huge anyway.
       2) Add back fs.h or less bloated headers (err.h) to files that need it.
      
      As result, on x86_64 allyesconfig, fs.h dependencies cut down from 3929 files
      rebuilt down to 3444 (-12.3%).
      
      Cross-compile tested without regressions on my two usual configs and (sigh):
      
      alpha              arm-mx1ads        mips-bigsur          powerpc-ebony
      alpha-allnoconfig  arm-neponset      mips-capcella        powerpc-g5
      alpha-defconfig    arm-netwinder     mips-cobalt          powerpc-holly
      alpha-up           arm-netx          mips-db1000          powerpc-iseries
      arm                arm-ns9xxx        mips-db1100          powerpc-linkstation
      arm-assabet        arm-omap_h2_1610  mips-db1200          powerpc-lite5200
      arm-at91rm9200dk   arm-onearm        mips-db1500          powerpc-maple
      arm-at91rm9200ek   arm-picotux200    mips-db1550          powerpc-mpc7448_hpc2
      arm-at91sam9260ek  arm-pleb          mips-ddb5477         powerpc-mpc8272_ads
      arm-at91sam9261ek  arm-pnx4008       mips-decstation      powerpc-mpc8313_rdb
      arm-at91sam9263ek  arm-pxa255-idp    mips-e55             powerpc-mpc832x_mds
      arm-at91sam9rlek   arm-realview      mips-emma2rh         powerpc-mpc832x_rdb
      arm-ateb9200       arm-realview-smp  mips-excite          powerpc-mpc834x_itx
      arm-badge4         arm-rpc           mips-fulong          powerpc-mpc834x_itxgp
      arm-carmeva        arm-s3c2410       mips-ip22            powerpc-mpc834x_mds
      arm-cerfcube       arm-shannon       mips-ip27            powerpc-mpc836x_mds
      arm-clps7500       arm-shark         mips-ip32            powerpc-mpc8540_ads
      arm-collie         arm-simpad        mips-jazz            powerpc-mpc8544_ds
      arm-corgi          arm-spitz         mips-jmr3927         powerpc-mpc8560_ads
      arm-csb337         arm-trizeps4      mips-malta           powerpc-mpc8568mds
      arm-csb637         arm-versatile     mips-mipssim         powerpc-mpc85xx_cds
      arm-ebsa110        i386              mips-mpc30x          powerpc-mpc8641_hpcn
      arm-edb7211        i386-allnoconfig  mips-msp71xx         powerpc-mpc866_ads
      arm-em_x270        i386-defconfig    mips-ocelot          powerpc-mpc885_ads
      arm-ep93xx         i386-up           mips-pb1100          powerpc-pasemi
      arm-footbridge     ia64              mips-pb1500          powerpc-pmac32
      arm-fortunet       ia64-allnoconfig  mips-pb1550          powerpc-ppc64
      arm-h3600          ia64-bigsur       mips-pnx8550-jbs     powerpc-prpmc2800
      arm-h7201          ia64-defconfig    mips-pnx8550-stb810  powerpc-ps3
      arm-h7202          ia64-gensparse    mips-qemu            powerpc-pseries
      arm-hackkit        ia64-sim          mips-rbhma4200       powerpc-up
      arm-integrator     ia64-sn2          mips-rbhma4500       s390
      arm-iop13xx        ia64-tiger        mips-rm200           s390-allnoconfig
      arm-iop32x         ia64-up           mips-sb1250-swarm    s390-defconfig
      arm-iop33x         ia64-zx1          mips-sead            s390-up
      arm-ixp2000        m68k              mips-tb0219          sparc
      arm-ixp23xx        m68k-amiga        mips-tb0226          sparc-allnoconfig
      arm-ixp4xx         m68k-apollo       mips-tb0287          sparc-defconfig
      arm-jornada720     m68k-atari        mips-workpad         sparc-up
      arm-kafa           m68k-bvme6000     mips-wrppmc          sparc64
      arm-kb9202         m68k-hp300        mips-yosemite        sparc64-allnoconfig
      arm-ks8695         m68k-mac          parisc               sparc64-defconfig
      arm-lart           m68k-mvme147      parisc-allnoconfig   sparc64-up
      arm-lpd270         m68k-mvme16x      parisc-defconfig     um-x86_64
      arm-lpd7a400       m68k-q40          parisc-up            x86_64
      arm-lpd7a404       m68k-sun3         powerpc              x86_64-allnoconfig
      arm-lubbock        m68k-sun3x        powerpc-cell         x86_64-defconfig
      arm-lusl7200       mips              powerpc-celleb       x86_64-up
      arm-mainstone      mips-atlas        powerpc-chrp32
      Signed-off-by: default avatarAlexey Dobriyan <adobriyan@gmail.com>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      4e950f6f
  18. 27 Jul, 2007 2 commits
  19. 10 Jul, 2007 1 commit
  20. 31 May, 2007 1 commit
  21. 09 May, 2007 1 commit
    • Rafael J. Wysocki's avatar
      Add suspend-related notifications for CPU hotplug · 8bb78442
      Rafael J. Wysocki authored
      
      
      Since nonboot CPUs are now disabled after tasks and devices have been
      frozen and the CPU hotplug infrastructure is used for this purpose, we need
      special CPU hotplug notifications that will help the CPU-hotplug-aware
      subsystems distinguish normal CPU hotplug events from CPU hotplug events
      related to a system-wide suspend or resume operation in progress.  This
      patch introduces such notifications and causes them to be used during
      suspend and resume transitions.  It also changes all of the
      CPU-hotplug-aware subsystems to take these notifications into consideration
      (for now they are handled in the same way as the corresponding "normal"
      ones).
      
      [oleg@tv-sign.ru: cleanups]
      Signed-off-by: default avatarRafael J. Wysocki <rjw@sisk.pl>
      Cc: Gautham R Shenoy <ego@in.ibm.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Signed-off-by: default avatarOleg Nesterov <oleg@tv-sign.ru>
      Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      8bb78442
  22. 08 May, 2007 1 commit
  23. 27 Apr, 2007 3 commits
  24. 05 Mar, 2007 1 commit
  25. 21 Feb, 2007 1 commit