Commit f275ac7f authored by Committed by Greg Kroah-Hartman
drm/amd/powerplay: fix vce cg logic error on CZ/St.
[ Upstream commit 3731d12d ] can fix Bug 191281: vce ib test failed. when vce idle, set vce clock gate, so the clock in vce domain will be disabled. when need to encode, disable vce clock gate, enable the clocks to vce engine. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <firstname.lastname@example.org> Signed-off-by: Alex Deucher <email@example.com> Signed-off-by: Sasha Levin <firstname.lastname@example.org> Signed-off-by: Greg Kroah-Hartman <email@example.com>
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