1. 30 Nov, 2015 1 commit
  2. 19 Oct, 2015 1 commit
  3. 21 Aug, 2015 1 commit
    • Michael van der Westhuizen's avatar
      spi: dw: Allow interface drivers to limit data I/O to word sizes · c4fe57f7
      Michael van der Westhuizen authored
      The commit dd114443 ("spi: dw-spi: Convert 16bit accesses to 32bit
      accesses") changed all 16bit accesses in the DW_apb_ssi driver to 32bit.
      This, unfortunately, breaks data register access on picoXcell, where the
      DW IP needs data register accesses to be word accesses (all other
      accesses appear to be OK).
      This change introduces a new master variable to allow interface drivers
      to specify that 16bit data transfer I/O is required.  This change also
      introduces the ability to set this variable via device tree bindings in
      the MMIO interface driver.  Both the core and the MMIO interface driver
      default to the current 32bit behaviour.
      Before this change, on a picoXcell pc3x3:
       spi_master spi32766: interrupt_transfer: fifo overrun/underrun
       m25p80 spi32766.0: error -5 reading 9f
       m25p80: probe of spi32766.0 failed with error -5
      After this change:
       m25p80 spi32766.0: m25p40 (512 Kbytes)
      Fixes: dd114443 ("spi: dw-spi: Convert 16bit accesses to 32bit accesses")
      Signed-off-by: default avatarMichael van der Westhuizen <michael@smart-africa.com>
      Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
      Signed-off-by: default avatarMark Brown <broonie@kernel.org>
  4. 17 Mar, 2015 1 commit
    • Thor Thayer's avatar
      spi: dw-spi: Convert 16bit accesses to 32bit accesses · dd114443
      Thor Thayer authored
      Altera's Arria10 SoC interconnect requires a 32-bit write for APB
      peripherals. The current spi-dw driver uses 16-bit accesses in
      some locations. This patch converts all the 16-bit reads and
      writes to 32-bit reads and writes.
      Additional Documentation to Support this Change:
      The DW_apb_ssi databook states:
      "All registers in the DW_apb_ssi are addressed at 32-bit boundaries
      to remain consistent with the AHB bus. Where the physical size of
      any register is less than 32-bits wide, the upper unused bits of
      the 32-bit boundary are reserved. Writing to these bits has no
      effect; reading from these bits returns 0." [1]
      [1] Section 6.1 of dw_apb_ssi.pdf (version 3.22a)
      Request for test with platforms using the DesignWare SPI IP.
      Tested On:
      Altera CycloneV development kit
      Altera Arria10 development kit
      Compile tested for build errors on x86_64 (allyesconfigs)
      Signed-off-by: default avatarThor Thayer <tthayer@opensource.altera.com>
      Reviewed-and-tested-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
      Signed-off-by: default avatarMark Brown <broonie@kernel.org>
  5. 09 Mar, 2015 4 commits
  6. 06 Mar, 2015 2 commits
  7. 28 Oct, 2014 1 commit
  8. 02 Oct, 2014 1 commit
  9. 13 Sep, 2014 2 commits
  10. 24 Apr, 2014 2 commits
  11. 31 Dec, 2013 1 commit
  12. 30 Dec, 2013 1 commit
  13. 21 Sep, 2011 1 commit
    • H Hartley Sweeten's avatar
      spi: spi-dw: fix all sparse warnings · 7eb187b3
      H Hartley Sweeten authored
      The dw_{read,write}[lw] macros produce sparse warnings everytime they
      are used.  The "read" ones cause:
      warning: cast removes address space of expression
      warning: incorrect type in argument 1 (different address spaces)
         expected void const volatile [noderef] <asn:2>*addr
         got unsigned int *<noident>
      And the "write" ones:
      warning: cast removes address space of expression
      warning: incorrect type in argument 2 (different address spaces)
         expected void volatile [noderef] <asn:2>*addr
         got unsigned int *<noident>
      Fix this by removing struct dw_spi_reg and converting all the register
      offsets to #defines. Then convert the macros into inlined functions so
      that proper type checking can occur.
      While here, also fix the three sparse warnings in spi-dw-mid.c due to
      the return value of ioremap_nocache being stored in a u32 * not a
      void __iomem *.
      With these changes the spi-dw* files all build with no sparse warnings.
      Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
      Acked-by: default avatarFeng Tang <feng.tang@intel.com>
      Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
  14. 08 Jul, 2011 1 commit
  15. 06 Jun, 2011 1 commit
  16. 31 Mar, 2011 2 commits
  17. 18 Mar, 2011 2 commits
    • Grant Likely's avatar
      spi/dw_spi: move dw_spi.h into drivers/spi · 568a60ed
      Grant Likely authored
      include/linux/dw_spi.h only includes driver internal data.  It doesn't
      expose a platform_data configuration structure or similar (at least
      nothing in-tree).  This patch moves the header into drivers/spi so
      that the scope is limited to only the dw_spi_*.c driver files
      Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
      Cc: Feng Tang <feng.tang@intel.com>
      Cc: spi-devel-general@lists.sourceforge.net
    • Jiri Slaby's avatar
      spi/dw_spi: Fix missing header · 46165a3d
      Jiri Slaby authored
      Currently, build on PPC dies with:
      In file included from drivers/spi/dw_spi_mmio.c:16:
      include/linux/spi/dw_spi.h:147: error: field ‘tx_sgl’ has incomplete type
      include/linux/spi/dw_spi.h:149: error: field ‘rx_sgl’ has incomplete type
      Add linux/scatterlist.h include to dw_spi.h, because we need to know
      the contents of the structure.
      Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
      Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
  18. 24 Dec, 2010 1 commit
  19. 08 Sep, 2010 1 commit
  20. 21 Jan, 2010 1 commit
  21. 20 Jan, 2010 1 commit
  22. 17 Dec, 2009 1 commit