Commit 497c7598 authored by Tom Rini's avatar Tom Rini
Browse files

Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi

- Enable DM_SPI on siemens omap boards (Jagan)
- Dropped some non-dm supported omap3 boards (Jagan)
- Dropped non-dm code in omap3 spi driver (Jagan)
- Dropped non-dm code in kirkwood spi driver (Bhargav)
parents 610e1487 18c56605
......@@ -1921,12 +1921,10 @@ source "board/freescale/lx2160a/Kconfig"
source "board/freescale/mx35pdk/Kconfig"
source "board/freescale/s32v234evb/Kconfig"
source "board/grinn/chiliboard/Kconfig"
source "board/gumstix/pepper/Kconfig"
source "board/hisilicon/hikey/Kconfig"
source "board/hisilicon/hikey960/Kconfig"
source "board/hisilicon/poplar/Kconfig"
source "board/isee/igep003x/Kconfig"
source "board/silica/pengwyn/Kconfig"
source "board/spear/spear300/Kconfig"
source "board/spear/spear310/Kconfig"
source "board/spear/spear320/Kconfig"
......@@ -1934,7 +1932,6 @@ source "board/spear/spear600/Kconfig"
source "board/spear/x600/Kconfig"
source "board/st/stv0991/Kconfig"
source "board/tcl/sl50/Kconfig"
source "board/birdland/bav335x/Kconfig"
source "board/toradex/colibri_pxa270/Kconfig"
source "board/variscite/dart_6ul/Kconfig"
source "board/vscom/baltos/Kconfig"
......
......@@ -29,6 +29,5 @@ config MX31_CLK32
Frequency in Hz of the low frequency input clock. Typically
32768 or 32000 Hz.
source "board/freescale/mx31pdk/Kconfig"
endif
......@@ -103,21 +103,6 @@ config TARGET_AM335X_SL50
select DM_SERIAL
imply CMD_DM
config TARGET_BAV335X
bool "Support bav335x"
select BOARD_LATE_INIT
select DM
select DM_SERIAL
imply CMD_DM
help
The BAV335x OEM Network Processor integrates all the functions of an
embedded network computer in a small, easy to use SODIMM module which
incorporates the popular Texas Instruments Sitara 32bit ARM Coretex-A8
processor, with fast DDR3 512MB SDRAM, 4GB of embedded MMC and a Gigabit
ethernet with simple connection to external connectors.
For more information, visit: http://birdland.com/oem
config TARGET_BRXRE1
bool "Support BRXRE1"
select BOARD_LATE_INIT
......@@ -168,20 +153,6 @@ config TARGET_PCM051
select DM_SERIAL
imply CMD_DM
config TARGET_PENGWYN
bool "Support pengwyn"
select DM
select DM_GPIO
select DM_SERIAL
imply CMD_DM
config TARGET_PEPPER
bool "Support pepper"
select DM
select DM_GPIO
select DM_SERIAL
imply CMD_DM
config TARGET_PHYCORE_AM335X_R2
bool "Support phyCORE AM335X R2"
select DM
......
......@@ -86,13 +86,6 @@ config TARGET_OMAP3_OVERO
select OMAP3_GPIO_6
imply CMD_DM
config TARGET_OMAP3_ZOOM1
bool "TI Zoom1"
select DM
select DM_GPIO
select DM_SERIAL
imply CMD_DM
config TARGET_AM3517_CRANE
bool "am3517_crane"
......@@ -127,13 +120,6 @@ config TARGET_TAO3530
select OMAP3_GPIO_5
select OMAP3_GPIO_6
config TARGET_OMAP3_CAIRO
bool "QUIPOS CAIRO"
select DM
select DM_GPIO
select DM_SERIAL
imply CMD_DM
config TARGET_SNIPER
bool "LG Optimus Black"
select DM
......@@ -174,18 +160,14 @@ config SYS_SOC
source "board/logicpd/am3517evm/Kconfig"
source "board/ti/beagle/Kconfig"
source "board/compulab/cm_t35/Kconfig"
source "board/timll/devkit8000/Kconfig"
source "board/ti/evm/Kconfig"
source "board/isee/igep00x0/Kconfig"
source "board/overo/Kconfig"
source "board/logicpd/zoom1/Kconfig"
source "board/ti/am3517crane/Kconfig"
source "board/corscience/tricorder/Kconfig"
source "board/logicpd/omap3som/Kconfig"
source "board/nokia/rx51/Kconfig"
source "board/technexion/tao3530/Kconfig"
source "board/quipos/cairo/Kconfig"
source "board/lg/sniper/Kconfig"
endif
......@@ -4,9 +4,6 @@ choice
prompt "OMAP4 board select"
optional
config TARGET_DUOVERO
bool "OMAP4430 Gumstix Duovero"
config TARGET_OMAP4_PANDA
bool "TI OMAP4 PandaBoard"
......@@ -21,7 +18,6 @@ endchoice
config SYS_SOC
default "omap4"
source "board/gumstix/duovero/Kconfig"
source "board/ti/panda/Kconfig"
source "board/ti/sdp4430/Kconfig"
source "board/amazon/kc1/Kconfig"
......
......@@ -156,7 +156,6 @@ endchoice
endmenu
endif
source "board/compulab/cm_t54/Kconfig"
source "board/ti/omap5_uevm/Kconfig"
source "board/ti/dra7xx/Kconfig"
source "board/ti/am57xx/Kconfig"
......
if TARGET_BAV335X
config SYS_BOARD
default "bav335x"
config SYS_VENDOR
default "birdland"
config SYS_SOC
default "am33xx"
config SYS_CONFIG_NAME
default "bav335x"
config BAV_VERSION
int "BAV335x Version (1=A, 2=B)"
range 1 2
help
The BAV335x has various version of the board. Rev.A (mostly obsolete)
used 10/100 Ethernet PHY while Rev.B uses a Gigabit Ethernet PHY.
Overwrite this if you have an older Rev.A and want ethernet support.
endif
# SPDX-License-Identifier: GPL-2.0+
#
# Makefile
#
# Copyright (C) 2012-2014, Birdland Audio - http://birdland.com/oem
ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
obj-y := mux.o
endif
obj-y += board.o
Summary
=======
This document covers various features of the 'BAV335x' board build.
For more information about this board, visit http://birdland.com/oem
Hardware
========
The binary produced supports the bav335x Rev.A with 10/100 MB PHY
and Rev.B (default) with GB ethernet PHY.
If the BAV335x EEPROM is populated and programmed, the board will
automatically detect the version and extract proper serial# and
mac address from the EE.
Customization
=============
The following blocks are required:
- I2C, to talk with the PMIC and ensure that we do not run afoul of
errata 1.0.24.
When removing options as part of customization,
CONFIG_EXTRA_ENV_SETTINGS will need additional care to update for your
needs and to remove no longer relevant options as in some cases we
define additional text blocks (such as for NAND or DFU strings). Also
note that all of the SPL options are grouped together, rather than with
the IP blocks, so both areas will need their choices updated to reflect
the custom design.
// SPDX-License-Identifier: GPL-2.0+
/*
* board.c
*
* Board functions for Birdland Audio BAV335x Network Processor
*
* Copyright (c) 2012-2014 Birdland Audio - http://birdland.com/oem
*/
#include <common.h>
#include <env.h>
#include <errno.h>
#include <init.h>
#include <net.h>
#include <serial.h>
#include <spl.h>
#include <asm/arch/cpu.h>
#include <asm/arch/hardware.h>
#include <asm/arch/omap.h>
#include <asm/arch/ddr_defs.h>
#include <asm/arch/clock.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mem.h>
#include <asm/io.h>
#include <asm/emif.h>
#include <asm/gpio.h>
#include <i2c.h>
#include <miiphy.h>
#include <cpsw.h>
#include <power/tps65217.h>
#include <power/tps65910.h>
#include <env_internal.h>
#include <watchdog.h>
#include "board.h"
DECLARE_GLOBAL_DATA_PTR;
/* GPIO that controls power to DDR on EVM-SK */
#define GPIO_DDR_VTT_EN 7
static __maybe_unused struct ctrl_dev *cdev =
(struct ctrl_dev *)CTRL_DEVICE_BASE;
/*
* Read header information from EEPROM into global structure.
*/
static int read_eeprom(struct board_eeconfig *header)
{
/* Check if baseboard eeprom is available */
if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR))
return -ENODEV;
/* read the eeprom using i2c */
if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)header,
sizeof(struct board_eeconfig)))
return -EIO;
if (header->magic != BOARD_MAGIC) {
/* read the i2c eeprom again using only a 1 byte address */
if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 1, (uchar *)header,
sizeof(struct board_eeconfig)))
return -EIO;
if (header->magic != BOARD_MAGIC)
return -EINVAL;
}
return 0;
}
enum board_type get_board_type(bool debug)
{
int ecode;
struct board_eeconfig header;
ecode = read_eeprom(&header);
if (ecode == 0) {
if (header.version[1] == 'A') {
if (debug)
puts("=== Detected Board model BAV335x Rev.A");
return BAV335A;
} else if (header.version[1] == 'B') {
if (debug)
puts("=== Detected Board model BAV335x Rev.B");
return BAV335B;
} else if (debug) {
puts("### Un-known board model in serial-EE\n");
}
} else if (debug) {
switch (ecode) {
case -ENODEV:
puts("### Board doesn't have a serial-EE\n");
break;
case -EINVAL:
puts("### Board serial-EE signature is incorrect.\n");
break;
default:
puts("### IO Error reading serial-EE.\n");
break;
}
}
#if (CONFIG_BAV_VERSION == 1)
if (debug)
puts("### Selecting BAV335A as per config\n");
return BAV335A;
#elif (CONFIG_BAV_VERSION == 2)
if (debug)
puts("### Selecting BAV335B as per config\n");
return BAV335B;
#endif
#if (NOT_DEFINED == 2)
#error "SHOULD NEVER DISPLAY THIS"
#endif
if (debug)
puts("### Defaulting to model BAV335x Rev.B\n");
return BAV335B;
}
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
static const struct ddr_data ddr3_bav335x_data = {
.datardsratio0 = MT41K256M16HA125E_RD_DQS,
.datawdsratio0 = MT41K256M16HA125E_WR_DQS,
.datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
.datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
};
static const struct cmd_control ddr3_bav335x_cmd_ctrl_data = {
.cmd0csratio = MT41K256M16HA125E_RATIO,
.cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
.cmd1csratio = MT41K256M16HA125E_RATIO,
.cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
.cmd2csratio = MT41K256M16HA125E_RATIO,
.cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
};
static struct emif_regs ddr3_bav335x_emif_reg_data = {
.sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
.ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
.sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
.sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
.sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
.zq_config = MT41K256M16HA125E_ZQ_CFG,
.emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
};
#ifdef CONFIG_SPL_OS_BOOT
int spl_start_uboot(void)
{
/* break into full u-boot on 'c' */
if (serial_tstc() && serial_getc() == 'c')
return 1;
#ifdef CONFIG_SPL_ENV_SUPPORT
env_init();
env_load();
if (env_get_yesno("boot_os") != 1)
return 1;
#endif
return 0;
}
#endif
#define OSC (V_OSCK/1000000)
const struct dpll_params dpll_ddr = {
266, OSC-1, 1, -1, -1, -1, -1};
const struct dpll_params dpll_ddr_evm_sk = {
303, OSC-1, 1, -1, -1, -1, -1};
const struct dpll_params dpll_ddr_bone_black = {
400, OSC-1, 1, -1, -1, -1, -1};
void am33xx_spl_board_init(void)
{
/* debug print detect status */
(void)get_board_type(true);
/* Get the frequency */
/* dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev); */
dpll_mpu_opp100.m = MPUPLL_M_1000;
if (i2c_probe(TPS65217_CHIP_PM))
return;
/* Set the USB Current Limit */
if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_POWER_PATH,
TPS65217_USB_INPUT_CUR_LIMIT_1800MA,
TPS65217_USB_INPUT_CUR_LIMIT_MASK))
puts("! tps65217_reg_write: could not set USB limit\n");
/* Set the Core Voltage (DCDC3) to 1.125V */
if (tps65217_voltage_update(TPS65217_DEFDCDC3,
TPS65217_DCDC_VOLT_SEL_1125MV)) {
puts("! tps65217_reg_write: could not set Core Voltage\n");
return;
}
/* Set CORE Frequencies to OPP100 */
do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
/* Set the MPU Voltage (DCDC2) */
if (tps65217_voltage_update(TPS65217_DEFDCDC2,
TPS65217_DCDC_VOLT_SEL_1325MV)) {
puts("! tps65217_reg_write: could not set MPU Voltage\n");
return;
}
/*
* Set LDO3, LDO4 output voltage to 3.3V for Beaglebone.
* Set LDO3 to 1.8V and LDO4 to 3.3V for Beaglebone Black.
*/
if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, TPS65217_DEFLS1,
TPS65217_LDO_VOLTAGE_OUT_1_8, TPS65217_LDO_MASK))
puts("! tps65217_reg_write: could not set LDO3\n");
if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, TPS65217_DEFLS2,
TPS65217_LDO_VOLTAGE_OUT_3_3, TPS65217_LDO_MASK))
puts("! tps65217_reg_write: could not set LDO4\n");
/* Set MPU Frequency to what we detected now that voltages are set */
do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
}
const struct dpll_params *get_dpll_ddr_params(void)
{
enable_i2c0_pin_mux();
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
return &dpll_ddr_bone_black;
}
void set_uart_mux_conf(void)
{
#if CONFIG_CONS_INDEX == 1
enable_uart0_pin_mux();
#elif CONFIG_CONS_INDEX == 2
enable_uart1_pin_mux();
#elif CONFIG_CONS_INDEX == 3
enable_uart2_pin_mux();
#elif CONFIG_CONS_INDEX == 4
enable_uart3_pin_mux();
#elif CONFIG_CONS_INDEX == 5
enable_uart4_pin_mux();
#elif CONFIG_CONS_INDEX == 6
enable_uart5_pin_mux();
#endif
}
void set_mux_conf_regs(void)
{
enum board_type board;
board = get_board_type(false);
enable_board_pin_mux(board);
}
const struct ctrl_ioregs ioregs_bonelt = {
.cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
.cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
.cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
.dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
.dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
};
void sdram_init(void)
{
config_ddr(400, &ioregs_bonelt,
&ddr3_bav335x_data,
&ddr3_bav335x_cmd_ctrl_data,
&ddr3_bav335x_emif_reg_data, 0);
}
#endif
/*
* Basic board specific setup. Pinmux has been handled already.
*/
int board_init(void)
{
#if defined(CONFIG_HW_WATCHDOG)
hw_watchdog_init();
#endif
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
gpmc_init();
#endif
return 0;
}
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
env_set("board_name", "BAV335xB");
env_set("board_rev", "B"); /* Fix me, but why bother.. */
#endif
return 0;
}
#endif
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
static void cpsw_control(int enabled)
{
/* VTP can be added here */
return;
}
static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
.phy_addr = 0,
},
{
.slave_reg_ofs = 0x308,
.sliver_reg_ofs = 0xdc0,
.phy_addr = 1,
},
};
static struct cpsw_platform_data cpsw_data = {
.mdio_base = CPSW_MDIO_BASE,
.cpsw_base = CPSW_BASE,
.mdio_div = 0xff,
.channels = 8,
.cpdma_reg_ofs = 0x800,
.slaves = 1,
.slave_data = cpsw_slaves,
.ale_reg_ofs = 0xd00,
.ale_entries = 1024,
.host_port_reg_ofs = 0x108,
.hw_stats_reg_ofs = 0x900,
.bd_ram_ofs = 0x2000,
.mac_control = (1 << 5),
.control = cpsw_control,
.host_port_num = 0,
.version = CPSW_CTRL_VERSION_2,
};
#endif
/*
* This function will:
* Perform fixups to the PHY present on certain boards. We only need this
* function in:
* - SPL with either CPSW or USB ethernet support
* - Full U-Boot, with either CPSW or USB ethernet
* Build in only these cases to avoid warnings about unused variables
* when we build an SPL that has neither option but full U-Boot will.
*/
#if ((defined(CONFIG_SPL_ETH_SUPPORT) || defined(CONFIG_SPL_USB_ETHER)) &&\
defined(CONFIG_SPL_BUILD)) || \
((defined(CONFIG_DRIVER_TI_CPSW) || \
defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)) && \
!defined(CONFIG_SPL_BUILD))
int board_eth_init(bd_t *bis)
{
int ecode, rv, n;
uint8_t mac_addr[6];
struct board_eeconfig header;
__maybe_unused enum board_type board;
/* Default manufacturing address; used when no EE or invalid */
n = 0;
mac_addr[0] = 0;
mac_addr[1] = 0x20;
mac_addr[2] = 0x18;
mac_addr[3] = 0x1C;
mac_addr[4] = 0x00;
mac_addr[5] = 0x01;
ecode = read_eeprom(&header);
/* if we have a valid EE, get mac address from there */
if ((ecode == 0) &&
is_valid_ethaddr((const u8 *)&header.mac_addr[0][0])) {
memcpy(mac_addr, (const void *)&header.mac_addr[0][0], 6);
}
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
eth_env_set_enetaddr("ethaddr", mac_addr);
}
#ifdef CONFIG_DRIVER_TI_CPSW
board = get_board_type(false);
/* Rev.A uses 10/100 PHY in mii mode */
if (board == BAV335A) {
writel(MII_MODE_ENABLE, &cdev->miisel);
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_MII;
cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_MII;
}
/* Rev.B (default) uses GB PHY in rmii mode */
else {
writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel);
cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if
= PHY_INTERFACE_MODE_RGMII;
}
rv = cpsw_register(&cpsw_data);