Commit aa49bb71 authored by Simon Glass's avatar Simon Glass
Browse files

wip

parent 5744c87a
......@@ -1442,6 +1442,7 @@ quiet_cmd_ldr = LD $@
cmd_ldr = $(LD) $(LDFLAGS_$(@F)) \
$(filter-out FORCE,$^) -o $@
BINMAN_u-boot.rom := $(if $(CONFIG_CHROMEOS),-i rom)
u-boot.rom: u-boot-x86-16bit.bin u-boot.bin \
$(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \
$(if $(CONFIG_TPL_X86_16BIT_INIT),tpl/u-boot-tpl.bin) \
......
......@@ -50,6 +50,10 @@ obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/
obj-$(CONFIG_INTEL_TANGIER) += tangier/
obj-$(CONFIG_APIC) += lapic.o ioapic.o
obj-y += irq.o
ifneq ($(CONFIG_$(SPL_)X86_32BIT_INIT),)
obj-$(CONFIG_SMP) += mp_init.o
endif
ifndef CONFIG_$(SPL_)X86_64
obj-$(CONFIG_SMP) += mp_init.o
endif
......
......@@ -212,8 +212,10 @@ int last_stage_init(void)
static int x86_init_cpus(void)
{
#ifdef CONFIG_SMP
# if CONFIG_IS_ENABLED(X86_32BIT_INIT) || !defined(CONFIG_X86_RUN_64BIT)
debug("Init additional CPUs\n");
x86_mp_init();
# endif
#else
struct udevice *dev;
......@@ -237,8 +239,9 @@ int cpu_init_r(void)
return 0;
ret = x86_init_cpus();
if (ret)
return ret;
#warning "skip"
// if (ret)
// return ret;
/*
* Set up the northbridge, PCH and LPC if available. Note that these
......
......@@ -8,8 +8,6 @@
#ifndef _COREBOOT_SYSINFO_H
#define _COREBOOT_SYSINFO_H
#include <asm/coreboot_tables.h>
/* Maximum number of memory range definitions */
#define SYSINFO_MAX_MEM_RANGES 32
/* Allow a maximum of 8 GPIOs */
......@@ -57,4 +55,6 @@ extern struct sysinfo_t lib_sysinfo;
int get_coreboot_info(struct sysinfo_t *info);
struct sysinfo_t *lib_sysinfo_get(void);
#endif
......@@ -8,6 +8,8 @@
#ifndef _COREBOOT_TABLES_H
#define _COREBOOT_TABLES_H
struct memory_area;
struct cbuint64 {
u32 lo;
u32 hi;
......
......@@ -60,6 +60,14 @@ config TARGET_CHROMEBOOK_SAMUS_TPL
between different A/B versions of SPL/U-Boot, to allow upgrading of
almost all U-Boot code in the field.
config TARGET_CHROMEOS_SAMUS
bool "Chromium OS samus"
help
This is a version of Samus which boots Chromium OS verified boot.
See the instructions in doc/README.chromium for more information on
how to build and run this. The Chromium OS interface code is located
in the cros/ subdirectory.
endchoice
source "board/google/chromebook_link/Kconfig"
......
if TARGET_CHROMEBOOK_SAMUS || TARGET_CHROMEBOOK_SAMUS_TPL
if TARGET_CHROMEBOOK_SAMUS || TARGET_CHROMEBOOK_SAMUS_TPL || TARGET_CHROMEOS_SAMUS
config SYS_BOARD
default "chromebook_samus"
......@@ -12,6 +12,7 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "chromebook_samus" if TARGET_CHROMEBOOK_SAMUS
default "chromebook_samus" if TARGET_CHROMEBOOK_SAMUS_TPL
default "chromeos_samus" if TARGET_CHROMEOS_SAMUS
config SYS_TEXT_BASE
default 0xffe00000
......
......@@ -11,3 +11,10 @@ S: Maintained
F: board/google/chromebook_samus/
F: include/configs/chromebook_samus.h
F: configs/chromebook_samus_tpl_defconfig
CHROMEOS SAMUS BOARD
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: board/google/chromebook_samus/
F: include/configs/chromeos_samus.h
F: configs/chromeos_samus_defconfig
......@@ -69,6 +69,13 @@ config SPL_BOOTSTAGE_RECORD_COUNT
This is the size of the bootstage record list and is the maximum
number of bootstage records that can be recorded.
config TPL_BOOTSTAGE_RECORD_COUNT
int "Number of boot stage records to store for TPL"
default 5
help
This is the size of the bootstage record list and is the maximum
number of bootstage records that can be recorded.
config BOOTSTAGE_FDT
bool "Store boot timing information in the OS device tree"
depends on BOOTSTAGE
......
CONFIG_X86=y
CONFIG_SYS_TEXT_BASE=0xffed0000
CONFIG_SYS_MALLOC_F_LEN=0x6000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0x3f8
CONFIG_DEBUG_UART_CLOCK=1843200
CONFIG_VENDOR_GOOGLE=y
CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus"
CONFIG_TARGET_CHROMEOS_SAMUS=y
CONFIG_DEBUG_UART=y
CONFIG_HAVE_MRC=y
CONFIG_HAVE_REFCODE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_NR_DRAM_BANKS=8
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_LOG_MAX_LEVEL=6
CONFIG_SPL_LOG_MAX_LEVEL=7
CONFIG_TPL_LOG_MAX_LEVEL=6
CONFIG_LOG_DEFAULT_LEVEL=7
CONFIG_LOG_ERROR_RETURN=y
CONFIG_MISC_INIT_R=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_LAST_STAGE_INIT=y
CONFIG_BLOBLIST_SIZE=0x1000
CONFIG_BLOBLIST_ADDR=0xff7c0000
CONFIG_HANDOFF=y
# CONFIG_SPL_ENV_SUPPORT is not set
CONFIG_SPL_NET_SUPPORT=y
CONFIG_SPL_PCI=y
CONFIG_SPL_PCH_SUPPORT=y
CONFIG_SPL_RTC_SUPPORT=y
# CONFIG_TPL_ENV_SUPPORT is not set
CONFIG_TPL_PCI=y
CONFIG_TPL_PCH_SUPPORT=y
CONFIG_TPL_RTC_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_SOUND=y
CONFIG_CMD_BOOTSTAGE=y
CONFIG_CMD_TPM=y
CONFIG_CMD_TPM_TEST=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_MAC_PARTITION=y
# CONFIG_SPL_MAC_PARTITION is not set
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
# CONFIG_SPL_EFI_PARTITION is not set
# CONFIG_NET is not set
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_MISC=y
CONFIG_TPL_MISC=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_LPC=y
CONFIG_SPL_CROS_EC_LPC=y
CONFIG_TPL_CROS_EC_LPC=y
CONFIG_SPL_DM_RTC=y
CONFIG_TPL_DM_RTC=y
CONFIG_RTC_MC146818=y
CONFIG_SYS_NS16550=y
CONFIG_SOUND=y
CONFIG_SPI=y
CONFIG_TPM_TIS_LPC=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
CONFIG_CONSOLE_SCROLL_LINES=5
CONFIG_CMD_DHRYSTONE=y
CONFIG_TPM=y
CONFIG_CHROMEOS=y
CONFIG_SPL_CHROMEOS=y
CONFIG_TPL_CHROMEOS=y
# CONFIG_EFI_LOADER is not set
CONFIG_SPL_BOOTSTAGE=y
CONFIG_TPL_BOOTSTAGE=y
CONFIG_SPL_SEPARATE_BSS=y
# CONFIG_TPL_BLOCK_CACHE is not set
# CONFIG_TPL_BLK is not set
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2018 Google, Inc
* Written by Simon Glass <sjg@chromium.org>
*/
#ifndef __configs_chromeos_samus_h__
#define __configs_chromeos_samus_h__
#define CONFIG_BOOTCOMMAND "vboot go auto"
#include <configs/chromebook_samus.h>
#include <configs/chromeos.h>
#undef CONFIG_STD_DEVICES_SETTINGS
#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \
"stdout=serial\0" \
"stderr=serial\0"
#define CONFIG_SPL_TEXT_BASE 0xffe70000
#define CONFIG_TPL_TEXT_BASE 0xfffd8000
#endif /* __configs_chromeos_samus_h__ */
......@@ -49,8 +49,7 @@
*/
#ifndef CONFIG_BOOTCOMMAND
#define CONFIG_BOOTCOMMAND \
"ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
#define CONFIG_BOOTCOMMAND "vboot go auto"
#endif
#if defined(CONFIG_CMD_KGDB)
......
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