1. 17 Sep, 2021 1 commit
    • Dave Gerlach's avatar
      clk: ti: k3-pll: Change DIV_CTRL programming to read-modify-write · d3c56e2a
      Dave Gerlach authored and Tom Rini's avatar Tom Rini committed
      There are three different divider values in the DIV_CTRL register
      controlled by the k3-pll driver. Currently the ti_pll_clk_set_rate
      function writes the entire register when programming plld, even though
      plld only resides in the lower 6 bits.
      
      Change the plld programming to read-modify-write to only affect the
      relevant bits for plld and to preserve the other two divider values
      present in the upper 16 bits, otherwise they will always get set to zero
      when programming plld.
      
      Fixes: 0aa2930c
      
       ("clk: add support for TI K3 SoC PLL")
      Signed-off-by: default avatarDave Gerlach <d-gerlach@ti.com>
      d3c56e2a
  2. 14 Sep, 2021 1 commit
  3. 13 Sep, 2021 6 commits
  4. 10 Sep, 2021 8 commits
  5. 08 Sep, 2021 1 commit
    • Alexandru Gagniuc's avatar
      image: Drop if/elseif hash selection in calculate_hash() · 92055e13
      Alexandru Gagniuc authored and Tom Rini's avatar Tom Rini committed
      
      
      calculate_hash() would try to select the appropriate hashing function
      by a if/elseif contruct. But that is exactly why hash_lookup_algo()
      exists, so use it instead.
      
      This does mean that we now have to 'select HASH' to make sure we get
      the hash_lookup_algo() symbol. However, the change makes sense because
      even basic FITs will have to deal with "hash" nodes.
      
      My only concern is that the 'select SPL_HASH' might cause some
      platform to grow above its SPL size allowance
      Signed-off-by: default avatarAlexandru Gagniuc <mr.nuke.me@gmail.com>
      [trini: Make FSL_CAAM be implied only on ARM && SPL]
      Signed-off-by: Tom Rini's avatarTom Rini <trini@konsulko.com>
      92055e13
  6. 07 Sep, 2021 2 commits
  7. 03 Sep, 2021 2 commits
  8. 26 Aug, 2021 7 commits
  9. 25 Aug, 2021 4 commits
  10. 22 Aug, 2021 4 commits
  11. 21 Aug, 2021 3 commits
    • Oleh Kravchenko's avatar
      Fix flashing of eMMC user area with Fastboot · 55a202f6
      Oleh Kravchenko authored and Tom Rini's avatar Tom Rini committed
      
      
      'gpt' and 'mmc0' fastboot partitions have been treated as the same device,
      but it is wrong.
      
      Fill disk_partition structure with eMMC user partition info
      to properly flash data.
      Signed-off-by: default avatarOleh Kravchenko <oleg@kaa.org.ua>
      Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Sean Anderson <sean.anderson@seco.com>
      Cc: Tom Rini <trini@konsulko.com>
      Reviewed-by: default avatarSean Anderson <sean.anderson@seco.com>
      55a202f6
    • Oleh Kravchenko's avatar
      Fix flash and erase of eMMC Boot2 with Fastboot · 389b6765
      Oleh Kravchenko authored and Tom Rini's avatar Tom Rini committed
      
      
      The current U-Boot version has the next matches for boot partitions:
      > mmc0boot0 to EMMC_BOOT1
      > mmc0boot1 to EMMC_BOOT1 (should be EMMC_BOOT2)
      This patch fixes a typo for the boot partition number.
      Signed-off-by: default avatarOleh Kravchenko <oleg@kaa.org.ua>
      Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
      Cc: Marek Vasut <marex@denx.de>
      Reviewed-by: default avatarSean Anderson <sean.anderson@seco.com>
      389b6765
    • Adam Ford's avatar
      clk: clk_versaclock: Add support for versaclock driver · dcf2cee7
      Adam Ford authored and Tom Rini's avatar Tom Rini committed
      
      
      The driver is based on the Versaclock driver from the Linux code, but
      due differences in the clock API between them, some pieces had to be
      changed.
      
      This driver creates a mux, pfd, pll, and a series of fod ouputs.
       Rate               Usecnt      Name
      ------------------------------------------
       25000000             0        `-- x304-clock
       25000000             0            `-- clock-controller@6a.mux
       25000000             0                |-- clock-controller@6a.pfd
       2800000000           0                |   `-- clock-controller@6a.pll
       33333333             0                |       |-- clock-controller@6a.fod0
       33333333             0                |       |   `-- clock-controller@6a.out1
       33333333             0                |       |-- clock-controller@6a.fod1
       33333333             0                |       |   `-- clock-controller@6a.out2
       50000000             0                |       |-- clock-controller@6a.fod2
       50000000             0                |       |   `-- clock-controller@6a.out3
       125000000            0                |       `-- clock-controller@6a.fod3
       125000000            0                |           `-- clock-controller@6a.out4
       25000000             0                `-- clock-controller@6a.out0_sel_i2cb
      
      A translation function is added so the references to <&versaclock X> get routed
      to the corresponding clock-controller@6a.outX.
      Signed-off-by: default avatarAdam Ford <aford173@gmail.com>
      Reviewed-by: default avatarSean Anderson <sean.anderson@seco.com>
      dcf2cee7
  12. 18 Aug, 2021 1 commit