- 04 Mar, 2008 1 commit
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Stefan Roese authored
This patch fixes a problem seen on PPC4xx boards, when no MAC address is defined. Then no ethernet interface is available but a simple "tftp" command will return without any error message which is quite confusing. Signed-off-by:
Stefan Roese <sr@denx.de>
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- 03 Mar, 2008 6 commits
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Fix a typo in qe_upload_firmware() that prevented uploading firmware on systems with more than one RISC core. Signed-off-by:
Timur Tabi <timur@freescale.com>
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Originally pointed out by Laurent Pinchart <laurent.pinchart@tbox.biz>, see http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/22846 Signed-off-by: Bernhard Nemec <bnemec <at> ganssloser.com>
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If I try to "cp.b <ram> <dataflash>", u-boot selects normal flash routines instead of dataflash. This is because it checks "if source address is not dataflash" instead of target address. Signed-off-by:
Kim B. Heino <Kim.Heino@bluegiga.com>
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de>
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de>
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Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 02 Mar, 2008 23 commits
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This fixes the cluster size tests in the FAT32 file system. The current implementation of VFAT support doesn't work if the referred cluster has an offset > 16bit representation, causing "fatload" and "fatls" commands etc. to fail. Signed-off-by:
michael trimarchi <trimarchi@gandalf.sssup.it>
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de>
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The 405EZ only supports 512 bytes of rx-/tx-fifo EMAC sizes. But currently 4k/2k is configured. This patch fixes this issue. Thanks to Thomas Kindler <tkindler@lenord.de> for pointing this out. Signed-off-by:
Stefan Roese <sr@denx.de>
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Fix alignment fault on ARM when running modules. With out an explicit linker file gcc4.2.1 will half word align __bss_start's value. The word dereference will crash hello_world. signed-off-by Richard Woodruff <r-woodruff2@ti.com>
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The ext2 aligned process will corrupt the key data struct, the patch fix this. Signed-off-by:
Dave Liu <daveliu@freescale.com>
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Wolfgang Denk authored
Make sure CDPATH settings cannot interfere. Update CHANGELOG. Signed-off-by:
Wolfgang Denk <wd@denx.de>
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Add cscope build target to generate cscope database for code browsing. Signed-off-by:
Li Yang <leoli@freescale.com>
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erratum 5.6 states the autoneg completion bit is functional only if the autoneg bit is asserted. This fixes any secondarily-issued networking commands on non-gigabit links on the mpc8360 mds board. Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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Adds PCI support for MPC5121 Tested with drivers/net/rtl8139.c Support is conditional since PCI on old silicon does not work. ads5121_PCI_config turns on PCI In this version, condition compilation of PCI code has been moved from ifdef in board/ads5121/pci.c to board/ads5121/Makefile as suggested by Jean-Christophe PLAGNIOL-VILLARD Signed-off-by:
John Rigby <jrigby@freescale.com>
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Fix warnings while compilation with new gcc in eldk-4.2 Signed-off-by:
Anatolij Gustschin <agust@denx.de>
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U-Boot crashes in the net loop if CONFIG_4xx_DCACHE is enabled. To reproduce the problem ensure that 'ethrotate' environment variable isn't set to "no" and then run "tftp 200000 not_existent_file". This patch tries to fix the issue. Signed-off-by:
Anatolij Gustschin <agust@denx.de>
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Currently (since commit b2e2142c ) u-boot crashes on sequoia board while SPR test if CONFIG_4xx_DCACHE is enabled. This patch disables the cache while SPR test. Signed-off-by:
Anatolij Gustschin <agust@denx.de>
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Call fdt_fixup_memory() on the boards TQM5200, TQM5200_B, TQM5200S, TB5200 and TB5200_B to fixup the /memory node with the memory values detected by U-Boot. Signed-off-by:
Martin Krause <martin.krause@tqs.de>
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git://www.denx.de/git/u-boot-armWolfgang Denk authored
Conflicts: include/asm-arm/arch-imx/imx-regs.h Signed-off-by:
Wolfgang Denk <wd@denx.de>
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Call fdt_fixup_memory() on the boards TQM5200, TQM5200_B, TQM5200S, TB5200 and TB5200_B to fixup the /memory node with the memory values detected by U-Boot. Signed-off-by:
Martin Krause <martin.krause@tqs.de>
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This patch fixes a bug in the SDRAM initialization code for the TQM5200. The hi_addr bit is now set correctly. Without this patch the hi_addr bit is always set to 1, if the second SDRAM bank is not populated. For other MPC5200 boards a correspondig patch has already been applied some time ago, see commit a6310928 . Signed-off-by:
Martin Krause <martin.krause@tqs.de> -- Forget the first patch please. I confused flash with SDRAM in the comment ...
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"pointer targets in assignment differ in signedness" Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Sync register definitions with linux Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- actua1: actux1.c: In function 'checkboard': actux1.c:92: warning: unused variable 'revision' - actua2: actux2.c: In function 'checkboard': actux2.c:100: warning: unused variable 's' actux2.c:99: warning: unused variable 'revision' actux2.c: In function 'reset_phy': actux2.c:130: warning: unused variable 'i' - actua3: actux3.c: In function 'checkboard': actux3.c:114: warning: unused variable 'revision' Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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The previous patch was lacking of i386, microblaze, nios and nios2. This patch tries to fix them. Signed-off-by:
Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
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- 27 Feb, 2008 5 commits
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Kumar Gala authored
There is no reason to icbi when invalidating the temporary stack in the d-cache. Its impossible on e500 to have the i-cache contain any addresses in the temp stack and it can be problematic in generating transactions on the bus to non-valid addresses. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Andy Fleming authored
The source vector for the ECM was being set to 2, but that's what the source vector for DDR was being set to. Change it to 1. Signed-off-by:
Andy Fleming <afleming@freescale.com>
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Andy Fleming authored
Commit 0db37dc2 ... (and some others) changed the INIT_RAM TLB mappings to be unguarded. This collided with an existing "bug" where the mappings for the INIT_RAM were being kept around. This meant that speculative loads to those addresses were succeeding in the TLB, and going out to the bus, where they were causing an exception (there's nothing at that address). The Flash code was coincidentally causing such a speculative load. Rather than go back to mapping the INIT RAM as guarded, we fix it so that the entries for the INIT_RAM are invalidated. Thus the speculative loads will fail in the TLB, and have no effect. Signed-off-by:
Andy Fleming <afleming@freescale.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 25 Feb, 2008 5 commits
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Jon Loeliger authored
Back in commit a551cee9 (86xx: Fix GUR PCI config registers properly), we should have changed the MPC86xx_PORBMSR_HA and MPC86xx_PORDEVSR_IO_SEL symbols in the sbc8641d board as well. Fix this oversight. Signed-off-by:
Jon Loeliger <jdl@freescale.com>
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Stefan Roese authored
Don't include testdram() on NAND-booting target acadia_nand. This saves a few bytes and makes the target build clean again. Signed-off-by:
Stefan Roese <sr@denx.de>
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
Sync registers definition with linux Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
- actua1: actux1.c: In function 'checkboard': actux1.c:92: warning: unused variable 'revision' - actua2: actux2.c: In function 'checkboard': actux2.c:100: warning: unused variable 's' actux2.c:99: warning: unused variable 'revision' actux2.c: In function 'reset_phy': actux2.c:130: warning: unused variable 'i' - actua3: actux3.c: In function 'checkboard': actux3.c:114: warning: unused variable 'revision' Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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