Commit 278b90ce authored by Tom Rini's avatar Tom Rini
Browse files

configs: Migrate CONFIG_SYS_TEXT_BASE



On the NIOS2 and Xtensa architectures, we do not have
CONFIG_SYS_TEXT_BASE set.  This is a strict migration of the current
values into the defconfig and removing them from the headers.

I did not attempt to add more default values in and for now will leave
that to maintainers.
Signed-off-by: Tom Rini's avatarTom Rini <trini@konsulko.com>
parent 7c8f00e4
......@@ -378,15 +378,13 @@ config SYS_EXTRA_OPTIONS
new boards should not use this option.
config SYS_TEXT_BASE
depends on ARC || X86 || ARCH_UNIPHIER || ARCH_ZYNQMP || \
(M68K && !TARGET_ASTRO_MCF5373L) || MICROBLAZE || MIPS || \
ARCH_ZYNQ || ARCH_KEYSTONE || ARCH_OMAP2PLUS
depends on !NIOS2 && !XTENSA
depends on !EFI_APP
default 0x80800000 if ARCH_OMAP2PLUS
hex "Text Base"
help
TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture
The address in memory that U-Boot will be running from, initially.
default 0x80800000 if ARCH_OMAP2PLUS
config SYS_CLK_FREQ
......
......@@ -14,7 +14,6 @@
#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
/* Memory Info */
#define CONFIG_SYS_TEXT_BASE 0x61000000
#define CONFIG_SYS_SDRAM_BASE 0x61000000
#endif /* __IPROC_COMMON_CONFIGS_H */
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SYS_TEXT_BASE=0x4a000000
CONFIG_MACH_SUN4I=y
CONFIG_DRAM_CLK=480
CONFIG_DRAM_EMR1=4
......
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SYS_TEXT_BASE=0x4a000000
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=432
CONFIG_MMC0_CD_PIN="PG1"
......
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SYS_TEXT_BASE=0x4a000000
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=408
CONFIG_DRAM_EMR1=0
......
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SYS_TEXT_BASE=0x4a000000
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=408
CONFIG_DRAM_EMR1=0
......
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SYS_TEXT_BASE=0x4a000000
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
CONFIG_MMC0_CD_PIN="PH1"
......
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SYS_TEXT_BASE=0x4a000000
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
CONFIG_MMC0_CD_PIN="PH1"
......
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SYS_TEXT_BASE=0x4a000000
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
CONFIG_MMC0_CD_PIN="PH1"
......
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SYS_TEXT_BASE=0x4a000000
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
CONFIG_MMC0_CD_PIN="PH1"
......
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SYS_TEXT_BASE=0x4a000000
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
CONFIG_MMC0_CD_PIN="PH1"
......
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SYS_TEXT_BASE=0x4a000000
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
CONFIG_MMC0_CD_PIN="PH1"
......
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SYS_TEXT_BASE=0x4a000000
CONFIG_CONS_INDEX=1
CONFIG_MACH_SUN8I_A33=y
CONFIG_DRAM_CLK=432
......
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SYS_TEXT_BASE=0x4a000000
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=432
CONFIG_DRAM_ZQ=123
......
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SYS_TEXT_BASE=0x4a000000
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=432
CONFIG_MMC0_CD_PIN="PG0"
......
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SYS_TEXT_BASE=0x4a000000
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=408
CONFIG_DRAM_EMR1=0
......
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SYS_TEXT_BASE=0x4a000000
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=432
CONFIG_USB1_VBUS_PIN="PG13"
......
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0x00201000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
......
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_MPC85xx=y
CONFIG_TARGET_B4420QDS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
......
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_MPC85xx=y
CONFIG_TARGET_B4420QDS=y
CONFIG_FIT=y
......
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