Commit a381bcf5 authored by Kever Yang's avatar Kever Yang Committed by Simon Glass
Browse files

ARM64: rockchip: add support for rk3399 SoC based evb



RK3399 is a SoC from Rockchip with dual-core Cortex-A72
and quad-core Cortex-A53 CPU. It supports two USB3.0
type-C ports and two USB2.0 EHCI ports. Other interfaces
are very much like RK3288, the DRAM are 32bit width address
and support address from 0 to 4GB-128MB range.
Signed-off-by: Kever Yang's avatarKever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass's avatarSimon Glass <sjg@chromium.org>
parent 777c834f
......@@ -840,14 +840,12 @@ config STM32
config ARCH_ROCKCHIP
bool "Support Rockchip SoCs"
select SUPPORT_SPL
select SPL
select OF_CONTROL
select BLK
select DM
select SPL_DM
select SPL_DM if SPL
select SYS_MALLOC_F
select SPL_SYS_MALLOC_SIMPLE
select SPL_SYS_MALLOC_SIMPLE if SPL
select DM_GPIO
select DM_I2C
select DM_MMC
......
......@@ -3,6 +3,8 @@ if ARCH_ROCKCHIP
config ROCKCHIP_RK3036
bool "Support Rockchip RK3036"
select CPU_V7
select SUPPORT_SPL
select SPL
help
The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
including NEON and GPU, Mali-400 graphics, several DDR3 options
......@@ -12,6 +14,8 @@ config ROCKCHIP_RK3036
config ROCKCHIP_RK3288
bool "Support Rockchip RK3288"
select CPU_V7
select SUPPORT_SPL
select SPL
help
The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
......@@ -19,6 +23,17 @@ config ROCKCHIP_RK3288
and video codec support. Peripherals include Gigabit Ethernet,
USB2 host and OTG, SDIO, I2S, UART,s, SPI, I2C and PWMs.
config ROCKCHIP_RK3399
bool "Support Rockchip RK3399"
select ARM64
help
The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
and quad-core Cortex-A53.
including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
video interfaces supporting HDMI and eDP, several DDR3 options
and video codec support. Peripherals include Gigabit Ethernet,
USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
config ROCKCHIP_SPL_BACK_TO_BROM
bool "SPL returns to bootrom"
default y if ROCKCHIP_RK3036
......@@ -29,4 +44,5 @@ config ROCKCHIP_SPL_BACK_TO_BROM
source "arch/arm/mach-rockchip/rk3036/Kconfig"
source "arch/arm/mach-rockchip/rk3288/Kconfig"
source "arch/arm/mach-rockchip/rk3399/Kconfig"
endif
......@@ -16,3 +16,4 @@ obj-y += rk_timer.o
endif
obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/
obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/
if ROCKCHIP_RK3399
choice
prompt "RK3399 board select"
config TARGET_EVB_RK3399
bool "RK3399 evaluation board"
help
RK3399evb is a evaluation board for Rockchp rk3399,
with full function and phisical connectors support like type-C ports,
usb2.0 host ports, LVDS, JTAG, MAC, SDcard, HDMI, USB-2-serial...
endchoice
config SYS_SOC
default "rockchip"
config SYS_MALLOC_F_LEN
default 0x0800
source "board/rockchip/evb_rk3399/Kconfig"
endif
#
# (C) Copyright 2016 Rockchip Electronics Co., Ltd
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += rk3399.o
/*
* Copyright (c) 2016 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/armv8/mmu.h>
static struct mm_region rk3399_mem_map[] = {
{
.virt = 0x0UL,
.phys = 0x0UL,
.size = 0x80000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
.virt = 0xf0000000UL,
.phys = 0xf0000000UL,
.size = 0x10000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* List terminator */
0,
}
};
struct mm_region *mem_map = rk3399_mem_map;
if TARGET_EVB_RK3399
config SYS_BOARD
default "evb_rk3399"
config SYS_VENDOR
default "rockchip"
config SYS_CONFIG_NAME
default "evb_rk3399"
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
endif
#
# (C) Copyright 2016 Rockchip Electronics Co., Ltd
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += evb-rk3399.o
/*
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/armv8/mmu.h>
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
return 0;
}
int dram_init(void)
{
gd->ram_size = 0x80000000;
return 0;
}
void dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = 0;
gd->bd->bi_dram[0].size = 0x80000000;
}
/*
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __EVB_RK3399_H
#define __EVB_RK3399_H
#include <configs/rk3399_common.h>
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
/*
* SPL @ 32k for ~36k
* ENV @ 96k
* u-boot @ 128K
*/
#define CONFIG_ENV_OFFSET (96 * 1024)
#define SDRAM_BANK_SIZE (2UL << 30)
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_CONSOLE_SCROLL_LINES 10
#endif
/*
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_RK3399_COMMON_H
#define __CONFIG_RK3399_COMMON_H
#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_SYS_NO_FLASH
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_BAUDRATE 1500000
#define CONFIG_SYS_MALLOC_LEN (32 << 20)
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_TEXT_BASE 0x00200000
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
#define CONFIG_SYS_LOAD_ADDR 0x00800800
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
/* MMC/SD IP block */
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_SDHCI
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000
#define CONFIG_FAT_WRITE
/* RAW SD card / eMMC locations. */
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256
#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
/* FAT sd card locations. */
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SYS_SDRAM_BASE 0
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SPI_FLASH
#define CONFIG_SPI
#define CONFIG_SF_DEFAULT_SPEED 20000000
#ifndef CONFIG_SPL_BUILD
#include <config_distro_defaults.h>
#define ENV_MEM_LAYOUT_SETTINGS \
"scriptaddr=0x00000000\0" \
"pxefile_addr_r=0x00100000\0" \
"fdt_addr_r=0x01f00000\0" \
"kernel_addr_r=0x02000000\0" \
"ramdisk_addr_r=0x04000000\0"
/* First try to boot from SD (index 0), then eMMC (index 1) */
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(MMC, mmc, 1)
#include <config_distro_bootcmd.h>
#define CONFIG_EXTRA_ENV_SETTINGS \
BOOTENV
#endif
#endif
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