Commit a94ab561 authored by Tom Rini's avatar Tom Rini
Browse files

Merge branch '2021-04-13-assorted-improvements'

- A large assortment of bug fixes, code cleanups and a few feature
  enhancements.
parents 3b676a16 8c4e3b79
......@@ -201,7 +201,6 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra124-venice2.dtb \
tegra186-p2771-0000-000.dtb \
tegra186-p2771-0000-500.dtb \
tegra210-e2220-1170.dtb \
tegra210-p2371-0000.dtb \
tegra210-p2371-2180.dtb \
tegra210-p2571.dtb \
......
/dts-v1/;
#include "tegra210.dtsi"
/ {
model = "NVIDIA E2220-1170";
compatible = "nvidia,e2220-1170", "nvidia,tegra210";
chosen {
stdout-path = &uarta;
};
aliases {
i2c0 = "/i2c@7000d000";
mmc0 = "/sdhci@700b0600";
mmc1 = "/sdhci@700b0000";
usb0 = "/usb@7d000000";
};
memory {
reg = <0x0 0x80000000 0x0 0xc0000000>;
};
sdhci@700b0000 {
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;
power-gpios = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
};
sdhci@700b0600 {
status = "okay";
bus-width = <8>;
non-removable;
};
i2c@7000d000 {
status = "okay";
clock-frequency = <400000>;
};
usb@7d000000 {
status = "okay";
dr_mode = "peripheral";
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
};
&uarta {
status = "okay";
};
......@@ -16,7 +16,6 @@
#include <command.h>
#include <cpu_func.h>
#include <dm.h>
#include <hang.h>
#include <lmb.h>
#include <log.h>
#include <asm/global_data.h>
......@@ -249,8 +248,7 @@ static void boot_prep_linux(bootm_headers_t *images)
#ifdef CONFIG_OF_LIBFDT
debug("using: FDT\n");
if (image_setup_linux(images)) {
printf("FDT creation failed! hanging...");
hang();
panic("FDT creation failed!");
}
#endif
} else if (BOOTM_ENABLE_TAGS) {
......@@ -283,8 +281,7 @@ static void boot_prep_linux(bootm_headers_t *images)
setup_board_tags(&params);
setup_end_tag(gd->bd);
} else {
printf("FDT and ATAGS support not compiled in - hanging\n");
hang();
panic("FDT and ATAGS support not compiled in\n");
}
board_prep_linux(images);
......
......@@ -3,14 +3,6 @@ if TEGRA210
choice
prompt "Tegra210 board select"
config TARGET_E2220_1170
bool "NVIDIA Tegra210 E2220-1170 board"
select BOARD_LATE_INIT
help
E2220-1170 is a Tegra210 bringup board with onboard SoC, DRAM,
eMMC, SD card slot, HDMI, USB micro-B port, and sockets for various
expansion modules.
config TARGET_P2371_0000
bool "NVIDIA Tegra210 P2371-0000 board"
select BOARD_LATE_INIT
......@@ -46,7 +38,6 @@ endchoice
config SYS_SOC
default "tegra210"
source "board/nvidia/e2220-1170/Kconfig"
source "board/nvidia/p2371-0000/Kconfig"
source "board/nvidia/p2371-2180/Kconfig"
source "board/nvidia/p2571/Kconfig"
......
......@@ -497,6 +497,27 @@
reg = <0x16>;
#reset-cells = <1>;
};
protocol@17 {
reg = <0x17>;
regulators {
#address-cells = <1>;
#size-cells = <0>;
regul0_scmi0: reg@0 {
reg = <0>;
regulator-name = "sandbox-voltd0";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <3300000>;
};
regul1_scmi0: reg@1 {
reg = <0x1>;
regulator-name = "sandbox-voltd1";
regulator-min-microvolt = <1800000>;
};
};
};
};
sandbox-scmi-agent@1 {
......@@ -1264,6 +1285,8 @@
compatible = "sandbox,scmi-devices";
clocks = <&clk_scmi0 7>, <&clk_scmi0 3>, <&clk_scmi1 1>;
resets = <&reset_scmi0 3>;
regul0-supply = <&regul0_scmi0>;
regul1-supply = <&regul1_scmi0>;
};
pinctrl {
......
......@@ -24,6 +24,7 @@ struct sandbox_scmi_clk {
/**
* struct sandbox_scmi_reset - Simulated reset controller exposed by SCMI
* @id: Identifier of the reset controller used in the SCMI protocol
* @asserted: Reset control state: true if asserted, false if desasserted
*/
struct sandbox_scmi_reset {
......@@ -31,13 +32,27 @@ struct sandbox_scmi_reset {
bool asserted;
};
/**
* struct sandbox_scmi_voltd - Simulated voltage regulator exposed by SCMI
* @id: Identifier of the voltage domain used in the SCMI protocol
* @enabled: Regulator state: true if on, false if off
* @voltage_uv: Regulator current voltage in microvoltd (uV)
*/
struct sandbox_scmi_voltd {
uint id;
bool enabled;
int voltage_uv;
};
/**
* struct sandbox_scmi_agent - Simulated SCMI service seen by SCMI agent
* @idx: Identifier for the SCMI agent, its index
* @clk: Simulated clocks
* @clk_count: Simulated clocks array size
* @clk: Simulated reset domains
* @clk_count: Simulated reset domains array size
* @reset: Simulated reset domains
* @reset_count: Simulated reset domains array size
* @voltd: Simulated voltage domains (regulators)
* @voltd_count: Simulated voltage domains array size
*/
struct sandbox_scmi_agent {
uint idx;
......@@ -45,6 +60,8 @@ struct sandbox_scmi_agent {
size_t clk_count;
struct sandbox_scmi_reset *reset;
size_t reset_count;
struct sandbox_scmi_voltd *voltd;
size_t voltd_count;
};
/**
......@@ -63,12 +80,16 @@ struct sandbox_scmi_service {
* @clk_count: Number of clock devices probed
* @reset: Array the reset controller devices
* @reset_count: Number of reset controller devices probed
* @regul: Array regulator devices
* @regul_count: Number of regulator devices probed
*/
struct sandbox_scmi_devices {
struct clk *clk;
size_t clk_count;
struct reset_ctl *reset;
size_t reset_count;
struct udevice **regul;
size_t regul_count;
};
#ifdef CONFIG_SCMI_FIRMWARE
......
......@@ -22,7 +22,14 @@ int cpu_qemu_get_desc(const struct udevice *dev, char *buf, int size)
static int cpu_qemu_get_count(const struct udevice *dev)
{
return qemu_fwcfg_online_cpus();
int ret;
struct udevice *qfw_dev;
ret = qfw_get_dev(&qfw_dev);
if (ret)
return ret;
return qfw_online_cpus(qfw_dev);
}
static const struct cpu_ops cpu_qemu_ops = {
......
......@@ -8,6 +8,7 @@
#include <init.h>
#include <pci.h>
#include <qfw.h>
#include <dm/platdata.h>
#include <asm/irq.h>
#include <asm/post.h>
#include <asm/processor.h>
......@@ -16,47 +17,9 @@
static bool i440fx;
#ifdef CONFIG_QFW
/* on x86, the qfw registers are all IO ports */
#define FW_CONTROL_PORT 0x510
#define FW_DATA_PORT 0x511
#define FW_DMA_PORT_LOW 0x514
#define FW_DMA_PORT_HIGH 0x518
static void qemu_x86_fwcfg_read_entry_pio(uint16_t entry,
uint32_t size, void *address)
{
uint32_t i = 0;
uint8_t *data = address;
/*
* writting FW_CFG_INVALID will cause read operation to resume at
* last offset, otherwise read will start at offset 0
*
* Note: on platform where the control register is IO port, the
* endianness is little endian.
*/
if (entry != FW_CFG_INVALID)
outw(cpu_to_le16(entry), FW_CONTROL_PORT);
/* the endianness of data register is string-preserving */
while (size--)
data[i++] = inb(FW_DATA_PORT);
}
static void qemu_x86_fwcfg_read_entry_dma(struct fw_cfg_dma_access *dma)
{
/* the DMA address register is big endian */
outl(cpu_to_be32((uintptr_t)dma), FW_DMA_PORT_HIGH);
while (be32_to_cpu(dma->control) & ~FW_CFG_DMA_ERROR)
__asm__ __volatile__ ("pause");
}
static struct fw_cfg_arch_ops fwcfg_x86_ops = {
.arch_read_pio = qemu_x86_fwcfg_read_entry_pio,
.arch_read_dma = qemu_x86_fwcfg_read_entry_dma
#if CONFIG_IS_ENABLED(QFW_PIO)
U_BOOT_DRVINFO(x86_qfw_pio) = {
.name = "qfw_pio",
};
#endif
......@@ -132,10 +95,6 @@ static void qemu_chipset_init(void)
enable_pm_ich9();
}
#ifdef CONFIG_QFW
qemu_fwcfg_init(&fwcfg_x86_ops);
#endif
}
#if !CONFIG_IS_ENABLED(SPL_X86_32BIT_INIT)
......
......@@ -18,7 +18,7 @@ int qemu_cpu_fixup(void)
int cpu_num;
int cpu_online;
struct uclass *uc;
struct udevice *dev, *pdev;
struct udevice *dev, *pdev, *qfwdev;
struct cpu_plat *plat;
char *cpu;
......@@ -39,6 +39,13 @@ int qemu_cpu_fixup(void)
return -ENODEV;
}
/* get qfw dev */
ret = qfw_get_dev(&qfwdev);
if (ret) {
printf("unable to find qfw device\n");
return ret;
}
/* calculate cpus that are already bound */
cpu_num = 0;
for (uclass_find_first_device(UCLASS_CPU, &dev);
......@@ -48,7 +55,7 @@ int qemu_cpu_fixup(void)
}
/* get actual cpu number */
cpu_online = qemu_fwcfg_online_cpus();
cpu_online = qfw_online_cpus(qfwdev);
if (cpu_online < 0) {
printf("unable to get online cpu number: %d\n", cpu_online);
return cpu_online;
......
......@@ -5,6 +5,8 @@ config SYS_TEXT_BASE
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select CMD_QFW
select QFW_MMIO
imply VIRTIO_MMIO
imply VIRTIO_PCI
imply VIRTIO_NET
......
......@@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select X86_RESET_VECTOR
select QEMU
select QFW_PIO
select BOARD_ROMSIZE_KB_1024
imply VIRTIO_PCI
imply VIRTIO_NET
......
if TARGET_E2220_1170
config SYS_BOARD
default "e2220-1170"
config SYS_VENDOR
default "nvidia"
config SYS_CONFIG_NAME
default "e2220-1170"
endif
E2220-1170 BOARD
M: Tom Warren <twarren@nvidia.com>
S: Maintained
F: board/nvidia/e2220-1170/
F: include/configs/e2220-1170.h
F: configs/e2220-1170_defconfig
#
# (C) Copyright 2013-2015
# NVIDIA Corporation <www.nvidia.com>
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += e2220-1170.o
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2013-2019
* NVIDIA Corporation <www.nvidia.com>
*/
#include <common.h>
#include <i2c.h>
#include <log.h>
#include <asm/arch/gpio.h>
#include <asm/arch/pinmux.h>
#include "../p2571/max77620_init.h"
void pin_mux_mmc(void)
{
struct udevice *dev;
uchar val;
int ret;
/* Turn on MAX77620 LDO2 to 3.3V for SD card power */
debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__);
ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev);
if (ret) {
printf("%s: Cannot find MAX77620 I2C chip\n", __func__);
return;
}
/* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
val = 0xF2;
ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1);
if (ret)
printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret);
}
......@@ -26,7 +26,6 @@
#include <mmc.h>
#include <usb.h>
#include <power/pmic.h>
#include <power/max77696_pmic.h>
DECLARE_GLOBAL_DATA_PTR;
......@@ -45,6 +44,53 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
PAD_CTL_ODE | PAD_CTL_SRE_FAST)
#define CONFIG_POWER_MAX77696_I2C_ADDR 0x3C
enum {
L01_CNFG1 = 0x43,
L01_CNFG2,
L02_CNFG1,
L02_CNFG2,
L03_CNFG1,
L03_CNFG2,
L04_CNFG1,
L04_CNFG2,
L05_CNFG1,
L05_CNFG2,
L06_CNFG1,
L06_CNFG2,
L07_CNFG1,
L07_CNFG2,
L08_CNFG1,
L08_CNFG2,
L09_CNFG1,
L09_CNFG2,
L10_CNFG1,
L10_CNFG2,
LDO_INT1,
LDO_INT2,
LDO_INT1M,
LDO_INT2M,
LDO_CNFG3,
SW1_CNTRL,
SW2_CNTRL,
SW3_CNTRL,
SW4_CNTRL,
EPDCNFG,
EPDINTS,
EPDINT,
EPDINTM,
EPDVCOM,
EPDVEE,
EPDVNEG,
EPDVPOS,
EPDVDDH,
EPDSEQ,
EPDOKINTS,
CID = 0x9c,
PMIC_NUM_OF_REGS,
};
int dram_init(void)
{
gd->ram_size = imx_ddr_size();
......@@ -114,6 +160,26 @@ struct i2c_pads_info i2c_pad_info1 = {
},
};
static int power_max77696_init(unsigned char bus)
{
static const char name[] = "MAX77696";
struct pmic *p = pmic_alloc();
if (!p) {
printf("%s: POWER allocation error!\n", __func__);
return -ENOMEM;
}
p->name = name;
p->interface = PMIC_I2C;
p->number_of_regs = PMIC_NUM_OF_REGS;
p->hw.i2c.addr = CONFIG_POWER_MAX77696_I2C_ADDR;
p->hw.i2c.tx_num = 1;
p->bus = bus;
return 0;
}
int power_init_board(void)
{
struct pmic *p;
......
......@@ -65,7 +65,7 @@ config SYS_PROMPT_HUSH_PS2
to complete a command. Usually "> ".
config SYS_XTRACE
string "Command execution tracer"
bool "Command execution tracer"
depends on CMDLINE
default y if CMDLINE
help
......
......@@ -10,13 +10,10 @@
static int do_exit(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
int r;
r = 0;
if (argc > 1)
r = simple_strtoul(argv[1], NULL, 10);
return simple_strtoul(argv[1], NULL, 10);
return -r - 2;
return 0;
}
U_BOOT_CMD(
......
......@@ -8,19 +8,22 @@
#include <env.h>
#include <errno.h>
#include <qfw.h>
#include <dm.h>
static struct udevice *qfw_dev;
/*
* This function prepares kernel for zboot. It loads kernel data
* to 'load_addr', initrd to 'initrd_addr' and kernel command
* line using qemu fw_cfg interface.
*/
static int qemu_fwcfg_setup_kernel(void *load_addr, void *initrd_addr)
static int qemu_fwcfg_cmd_setup_kernel(void *load_addr, void *initrd_addr)
{
char *data_addr;
uint32_t setup_size, kernel_size, cmdline_size, initrd_size;
qemu_fwcfg_read_entry(FW_CFG_SETUP_SIZE, 4, &setup_size);
qemu_fwcfg_read_entry(FW_CFG_KERNEL_SIZE, 4, &kernel_size);
qfw_read_entry(qfw_dev, FW_CFG_SETUP_SIZE, 4, &setup_size);
qfw_read_entry(qfw_dev, FW_CFG_KERNEL_SIZE, 4, &kernel_size);
if (setup_size == 0 || kernel_size == 0) {
printf("warning: no kernel available\n");
......@@ -28,28 +31,28 @@ static int qemu_fwcfg_setup_kernel(void *load_addr, void *initrd_addr)
}
data_addr = load_addr;
qemu_fwcfg_read_entry(FW_CFG_SETUP_DATA,
le32_to_cpu(setup_size), data_addr);
qfw_read_entry(qfw_dev, FW_CFG_SETUP_DATA,
le32_to_cpu(setup_size), data_addr);
data_addr += le32_to_cpu(setup_size);
qemu_fwcfg_read_entry(FW_CFG_KERNEL_DATA,
le32_to_cpu(kernel_size), data_addr);
qfw_read_entry(qfw_dev, FW_CFG_KERNEL_DATA,
le32_to_cpu(kernel_size), data_addr);
data_addr += le32_to_cpu(kernel_size);
data_addr = initrd_addr;
qemu_fwcfg_read_entry(FW_CFG_INITRD_SIZE, 4, &initrd_size);
qfw_read_entry(qfw_dev, FW_CFG_INITRD_SIZE, 4, &initrd_size);
if (initrd_size == 0) {
printf("warning: no initrd available\n");
} else {
qemu_fwcfg_read_entry(FW_CFG_INITRD_DATA,
le32_to_cpu(initrd_size), data_addr);
qfw_read_entry(qfw_dev, FW_CFG_INITRD_DATA,
le32_to_cpu(initrd_size), data_addr);
data_addr += le32_to_cpu(initrd_size);
}
qemu_fwcfg_read_entry(FW_CFG_CMDLINE_SIZE, 4, &cmdline_size);
qfw_read_entry(qfw_dev, FW_CFG_CMDLINE_SIZE, 4, &cmdline_size);
if (cmdline_size) {
qemu_fwcfg_read_entry(FW_CFG_CMDLINE_DATA,
le32_to_cpu(cmdline_size), data_addr);
qfw_read_entry(qfw_dev, FW_CFG_CMDLINE_DATA,
le32_to_cpu(cmdline_size), data_addr);
/*
* if kernel cmdline only contains '\0', (e.g. no -append
* when invoking qemu), do not update bootargs
......@@ -72,21 +75,20 @@ static int qemu_fwcfg_setup_kernel(void *load_addr, void *initrd_addr)
return 0;
}
static int qemu_fwcfg_list_firmware(void)
static int qemu_fwcfg_cmd_list_firmware(void)
{
int ret;
struct fw_cfg_file_iter iter;
struct fw_file *file;
/* make sure fw_list is loaded */
ret = qemu_fwcfg_read_firmware_list();
ret = qfw_read_firmware_list(qfw_dev);
if (ret)
return ret;
for (file = qemu_fwcfg_file_iter_init(&iter);
!qemu_fwcfg_file_iter_end(&iter);
file = qemu_fwcfg_file_iter_next(&iter)) {
for (file = qfw_file_iter_init(qfw_dev, &iter);
!qfw_file_iter_end(&iter);
file = qfw_file_iter_next(&iter)) {
printf("%-56s\n", file->cfg.name);
}
......@@ -96,7 +98,7 @@ static int qemu_fwcfg_list_firmware(void)
static int qemu_fwcfg_do_list(struct cmd_tbl *cmdtp, int flag,
int argc, char *const argv[])
{
if (qemu_fwcfg_list_firmware() < 0)
if (qemu_fwcfg_cmd_list_firmware() < 0)
return CMD_RET_FAILURE;
return 0;
......@@ -105,14 +107,7 @@ static