1. 30 Sep, 2021 9 commits
  2. 29 Sep, 2021 5 commits
  3. 28 Sep, 2021 6 commits
    • Tom Rini's avatar
      Merge branch '2021-09-28-regression-fixes' · b5d7a200
      Tom Rini authored
      - Reintroduce creating internally the "nor%d" style names, in order to
        fix some use U-Boot use-cases involving the "mtd" command.
      - Fix a regression over the default SPI bus mode shown by having the
        compiled default actually start being used.  The correct default here
        is 0.
      - Fix ethernet on imx7d-sdb
      - Fix a regression with MTD NAND devices when OF_LIVE is enabled
      b5d7a200
    • Rasmus Villemoes's avatar
      imx: imx7d-sdb: fix ethernet, sync .dts with linux · 24ea366a
      Rasmus Villemoes authored
      Commit 0d52bab4 (mx7dsabre: Enable DM_ETH) changed these flags from 0
      (aka GPIO_ACTIVE_HIGH) to GPIO_ACTIVE_LOW. It claimed to "Also sync
      device tree with v5.5-rc1", but in the linux tree, these gpios have
      always been GPIO_ACTIVE_HIGH ever since this node was introduced
      around v4.13 (linux commit 184f39b5).
      
      I'm guessing that the reason for the GPIO_ACTIVE_LOW was to work
      around the behaviour of the soft-spi driver back then, which
      effectively defaulted to spi-mode 3 and not 0. That was arguably a bug
      in the soft-spi driver, which then got fixed in 0e146993 (spi: add
      support for all spi modes with soft spi), but that commit then broke
      ethernet on this board.
      
      Fix it by setting the gpios as active high, which as a bonus actually
      brings us in sync with the .dts in the linux source tree.
      
      Without this, one gets
      
          Net:   Could not get PHY for FEC0: addr 0
          No ethernet found.
      
      With this, ethernet (at least ping and tftp) works as expected from
      the U-...
      24ea366a
    • Patrice Chotard's avatar
      mtd: nand: raw: convert nand_dt_init() to ofnode_xx() interface · b8919eaa
      Patrice Chotard authored
      
      
      nand_dt_init() is still using fdtdec_xx() interface.
      If OF_LIVE flag is enabled, dt property can't be get anymore.
      Updating all fdtdec_xx() interface to ofnode_xx() to solve this issue.
      
      For doing this, node parameter type must be ofnode.
      
      First idea was to convert "node" parameter to ofnode type inside
      nand_dt_init() using offset_to_ofnode(node). But offset_to_ofnode()
      is not bijective, in case OF_LIVE flag is enabled, it performs an assert().
      
      So, this leads to update nand_chip struct flash_node field from int to
      ofnode and to update all nand_dt_init() callers.
      Signed-off-by: Patrice Chotard's avatarPatrice Chotard <patrice.chotard@foss.st.com>
      b8919eaa
    • Marek Vasut's avatar
      mtd: spi: Set CONFIG_SF_DEFAULT_MODE default to 0 · b81ce79d
      Marek Vasut authored
      Before e2e95e5e
      
       ("spi: Update speed/mode on change") most systems
      silently defaulted to SF bus mode 0. Now the mode is always updated,
      which causes breakage. It seems most SF which are used as boot media
      operate in bus mode 0, so switch that as the default.
      
      This should fix booting at least on Altera SoCFPGA, ST STM32, Xilinx
      ZynqMP, NXP iMX and Rockchip SoCs, which recently ran into trouble
      with mode 3. Marvell Kirkwood and Xilinx microblaze need to be checked
      as those might need mode 3.
      Signed-off-by: Marek Vasut's avatarMarek Vasut <marex@denx.de>
      Cc: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
      Cc: Andreas Biessmann <andreas@biessmann.org>
      Cc: Eugen Hristev <eugen.hristev@microchip.com>
      Cc: Michal Simek <michal.simek@xilinx.com>
      Cc: Patrice Chotard <patrice.chotard@foss.st.com>
      Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
      Cc: Peng Fan <peng.fan@nxp.com>
      Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
      Cc: Tom Rini <trini@konsulko.com>
      Cc: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com>
      Cc: Vignesh Raghavendra <vigneshr@ti.com>
      b81ce79d
    • Patrick Delaunay's avatar
      mtd: spi: nor: force mtd name to "nor%d" · a4f2d834
      Patrick Delaunay authored
      Force the mtd name of spi-nor to "nor" + the driver sequence number:
      "nor0", "nor1"... beginning after the existing nor devices.
      
      This patch is coherent with existing "nand" and "spi-nand"
      mtd device names.
      
      When CFI MTD NOR device are supported, the spi-nor index is chosen after
      the last CFI device defined by CONFIG_SYS_MAX_FLASH_BANKS.
      
      When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated, this config
      is replaced by to cfi_flash_num_flash_banks in the include file
      mtd/cfi_flash.h.
      
      This generic name "nor%d" can be use to identify the mtd spi-nor device
      without knowing the real device name or the DT path of the device,
      used with API get_mtd_device_nm() and is used in mtdparts command.
      
      This patch also avoids issue when the same NOR device is present 2 times,
      for example on STM32MP15F-EV1:
      
      STM32MP> mtd list
      SF: Detected mx66l51235l with page size 256 Bytes, erase size 64 KiB, \
      total 64 MiB
      
      List of MTD devices:
      * nand0
        - type: NAND flash
        - block size: 0x40000 bytes
        - min I/O: 0x1000 bytes
        - OOB size: 224 bytes
        - OOB available: 118 bytes
        - ECC strength: 8 bits
        - ECC step size: 512 bytes
        - bitflip threshold: 6 bits
        - 0x000000000000-0x000040000000 : "nand0"
      * mx66l51235l
        - device: mx66l51235l@0
        - parent: spi@58003000
        - driver: jedec_spi_nor
        - path: /soc/spi@58003000/mx66l51235l@0
        - type: NOR flash
        - block size: 0x10000 bytes
        - min I/O: 0x1 bytes
        - 0x000000000000-0x000004000000 : "mx66l51235l"
      * mx66l51235l
        - device: mx66l51235l@1
        - parent: spi@58003000
        - driver: jedec_spi_nor
        - path: /soc/spi@58003000/mx66l51235l@1
        - type: NOR flash
        - block size: 0x10000 bytes
        - min I/O: 0x1 bytes
        - 0x000000000000-0x000004000000 : "mx66l51235l"
      
      The same mtd name "mx66l51235l" identify the 2 instances
      mx66l51235l@0 and mx66l51235l@1.
      
      This patch fixes a ST32CubeProgrammer / stm32prog command issue
      with nor0 target on STM32MP157C-EV1 board introduced by
      commit b7f06056 ("mtd: spi-nor: allow registering multiple MTDs when
      DM is enabled").
      
      Fixes: b7f06056
      
       ("mtd: spi-nor: allow registering multiple MTDs when DM is enabled")
      Signed-off-by: Patrick Delaunay's avatarPatrick Delaunay <patrick.delaunay@foss.st.com>
      [trini: Add <dm/device.h> to <mtd.h> for DM_MAX_SEQ_STR]
      Signed-off-by: Tom Rini's avatarTom Rini <trini@konsulko.com>
      a4f2d834
    • Patrick Delaunay's avatar
      mtd: cfi_flash: use cfi_flash_num_flash_banks only when supported · b218f865
      Patrick Delaunay authored
      
      
      When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated,
      CONFIG_SYS_MAX_FLASH_BANKS is replaced by cfi_flash_num_flash_banks,
      but this variable is defined in drivers/mtd/cfi_flash.c, which is
      compiled only when CONFIG_FLASH_CFI_DRIVER is activated, in U-Boot
      or in SPL when CONFIG_SPL_MTD_SUPPORT is activated.
      
      This patch deactivates this feature CONFIG_SYS_MAX_FLASH_BANKS_DETECT
      when flash cfi driver is not activated to avoid compilation issue in
      the next patch, when CONFIG_SYS_MAX_FLASH_BANKS is used in spi_nor_scan().
      Signed-off-by: Patrick Delaunay's avatarPatrick Delaunay <patrick.delaunay@foss.st.com>
      b218f865
  4. 27 Sep, 2021 4 commits
  5. 26 Sep, 2021 1 commit
  6. 25 Sep, 2021 2 commits
  7. 24 Sep, 2021 8 commits
  8. 23 Sep, 2021 2 commits
  9. 22 Sep, 2021 3 commits
    • Marek Vasut's avatar
      ddr: altera: use KBUILD_BASENAME instead of __FILE__ · 532010da
      Marek Vasut authored
      
      
      The KBUILD_BASENAME contains just the name of the compiled module,
      in this case 'sequencer', rather than a full path to the compiled
      file. Use it to prevent pulling the full path into the U-Boot binary,
      which is useless and annoying.
      Signed-off-by: Marek Vasut's avatarMarek Vasut <marex@denx.de>
      Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
      Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
      Cc: Tien Fong Chee <tien.fong.chee@intel.com>
      532010da
    • Marek Vasut's avatar
      arm: socfpga: vining: Let DWMAC configure PHY reset GPIO · b207cc92
      Marek Vasut authored
      
      
      The DM DWMAC driver is perfectly capable of configuring the ethernet
      PHY reset GPIO, let the driver do it instead of doing it in the board
      file.
      Signed-off-by: Marek Vasut's avatarMarek Vasut <marex@denx.de>
      Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
      Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
      Cc: Tien Fong Chee <tien.fong.chee@intel.com>
      b207cc92
    • Marek Vasut's avatar
      arm: socfpga: vining: Enable DW I2C driver · cb3ed86c
      Marek Vasut authored
      
      
      The Designware I2C IP is used to communicate with I2C peripherals on
      SoCFPGA, and required to access I2C EEPROM on this board. Enable it.
      Signed-off-by: Marek Vasut's avatarMarek Vasut <marex@denx.de>
      Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
      Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
      Cc: Tien Fong Chee <tien.fong.chee@intel.com>
      cb3ed86c