Commit 0c1456d5 authored by Heinrich Schuchardt's avatar Heinrich Schuchardt 💬 Committed by Tom Rini
Browse files

ARM: correct detection of thumb mode



When a crash occurs in thumb mode the crash dump is incorrect. This is due
to the usage of a non-existing configuration variable CONFIG_ARM_THUMB in
the definition of macro thumb_mode(regs).

Use CONFIG_IS_ENABLED(SYS_THUMB_BUILD) to detect that the code has been
compiled for thumb mode. Remove ARM_THUMB from config_whitelist.txt.

With the patch crash dumps indicate thumb mode correctly.

On a system with thumb mode:

=> exception unaligned
data abort
pc : [<8f7a2b52>]          lr : [<8f7ab1ef>]
reloc pc : [<1780cb52>]    lr : [<178151ef>]
sp : 8ed8c3f8  ip : 8f7a2b4d     fp : 00000002
r10: 8f7f8228  r9 : 8ed95ea8     r8 : 8ed99488
r7 : 8f7ab141  r6 : 00000000     r5 : 8ed8c3f9  r4 : 8f7f6390
r3 : 8ed9948c  r2 : 00000001     r1 : 00000000  r0 : 8f7f6390
Flags: nzCv  IRQs off  FIQs off  Mode SVC_32 (T)
Code: 8f7e 466d f105 0501 (e9d5) 6700

The Flags line has '(T)' and in the Code line the output is in u16 groups.

On a system without thumb mode:

=> exception breakpoint
prefetch abort
pc : [<7ff5a5c8>]          lr : [<7ff675ec>]
reloc pc : [<0000e5c8>]    lr : [<0001b5ec>]
sp : 7ee0ad80  ip : 7ff5a5cc     fp : 7ff674cc
r10: 00000002  r9 : 7ef0bed8     r8 : 7ffd6214
r7 : 7ef0e080  r6 : 00000000     r5 : 7ffd4090  r4 : 00000000
r3 : 7ef0e084  r2 : 00000001     r1 : 00000000  r0 : 7ffd4090
Flags: nzCv  IRQs off  FIQs off  Mode SVC_32
Code: e1a0500d e2855001 e1c560d0 e3a00001 (e12fff1e)

The Flags line does not show '(T)' and in the Code line the output is in
u32 groups.
Reported-by: Marek Vasut's avatarMarek Vasut <marex@denx.de>
Signed-off-by: Heinrich Schuchardt's avatarHeinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Marek Vasut's avatarMarek Vasut <marex@denx.de>
parent bd8fbd8a
......@@ -86,7 +86,7 @@ struct pt_regs {
#define user_mode(regs) \
(((regs)->ARM_cpsr & 0xf) == 0)
#ifdef CONFIG_ARM_THUMB
#if CONFIG_IS_ENABLED(SYS_THUMB_BUILD)
#define thumb_mode(regs) \
(((regs)->ARM_cpsr & T_BIT))
#else
......
......@@ -61,7 +61,6 @@ CONFIG_ARM_FREQ
CONFIG_ARM_GIC_BASE_ADDRESS
CONFIG_ARM_PL180_MMCI_BASE
CONFIG_ARM_PL180_MMCI_CLOCK_FREQ
CONFIG_ARM_THUMB
CONFIG_ARP_TIMEOUT
CONFIG_ASTRO_COFDMDUOS2
CONFIG_ASTRO_TWIN7S2
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment