Commit 3dd7f0f0 authored by wdenk's avatar wdenk
Browse files

* Add FEC support for TQM8540 board.

  Interfaces are named as follows: "ENET1" - TSEC2, "ENET2" - FEC

* Patch by Martin Krause, 04 Apr 2005:
  Update default configuration for CMC_PU2 board.
parent 8aa1a2d1
......@@ -2,6 +2,12 @@
Changes for U-Boot 1.1.3:
======================================================================
* Add FEC support for TQM8540 board.
Interfaces are named as follows: "ENET1" - TSEC2, "ENET2" - FEC
* Patch by Martin Krause, 04 Apr 2005:
Update default configuration for CMC_PU2 board.
* Patch by Steven Scholz, 04 Apr 2005:
- remove all references to CONFIG_INIT_CRITICAL for ARM based boards
- introduce two new configuration options instead:
......
......@@ -277,7 +277,21 @@ static int init_phy(struct eth_device *dev)
struct phy_info *curphy;
/* Assign a Physical address to the TBI */
priv->regs->tbipa=TBIPA_VALUE;
{
volatile tsec_t *regs = (volatile tsec_t *)(TSEC_BASE_ADDR);
regs->tbipa = TBIPA_VALUE;
regs = (volatile tsec_t *)(TSEC_BASE_ADDR + TSEC_SIZE);
regs->tbipa = TBIPA_VALUE;
asm("msync");
}
/* Reset MII (due to new addresses) */
priv->phyregs->miimcfg = MIIMCFG_RESET;
asm("msync");
priv->phyregs->miimcfg = MIIMCFG_INIT_VALUE;
asm("msync");
while(priv->phyregs->miimind & MIIMIND_BUSY);
if(0 == relocated)
relocate_cmds();
......@@ -793,19 +807,50 @@ struct phy_info phy_info_dm9161 = {
},
};
uint mii_parse_lxt971_sr2(uint mii_reg, struct tsec_private *priv)
{
unsigned int speed;
if (priv->link) {
speed = mii_reg & MIIM_LXT971_SR2_SPEED_MASK;
switch (speed) {
case MIIM_LXT971_SR2_10HDX:
priv->speed = 10;
priv->duplexity = 0;
break;
case MIIM_LXT971_SR2_10FDX:
priv->speed = 10;
priv->duplexity = 1;
break;
case MIIM_LXT971_SR2_100HDX:
priv->speed = 100;
priv->duplexity = 0;
default:
priv->speed = 100;
priv->duplexity = 1;
break;
}
} else {
priv->speed = 0;
priv->duplexity = 0;
}
return 0;
}
static struct phy_info phy_info_lxt971 = {
0x0001378e,
"LXT971",
4,
(struct phy_cmd []) { /* config */
{ MIIM_CONTROL, MIIM_CONTROL_INIT, mii_cr_init }, /* autonegotiate */
{ MIIM_CR, MIIM_CR_INIT, mii_cr_init }, /* autonegotiate */
{ miim_end, }
},
(struct phy_cmd []) { /* startup - enable interrupts */
/* { 0x12, 0x00f2, NULL }, */
{ 0x14, 0xd422, NULL }, /* LED config */
{ MIIM_STATUS, miim_read, NULL },
{ MIIM_STATUS, miim_read, mii_parse_sr },
{ MIIM_STATUS, miim_read, &mii_parse_sr },
{ MIIM_LXT971_SR2, miim_read, &mii_parse_lxt971_sr2 },
{ miim_end, }
},
(struct phy_cmd []) { /* shutdown - disable interrupts */
......
......@@ -142,6 +142,14 @@
#define MIIM_DM9161_10BTCSR 0x12
#define MIIM_DM9161_10BTCSR_INIT 0x7800
/* LXT971 Status 2 registers */
#define MIIM_LXT971_SR2 17 /* Status Register 2 */
#define MIIM_LXT971_SR2_SPEED_MASK 0xf000
#define MIIM_LXT971_SR2_10HDX 0x1000 /* 10 Mbit half duplex selected */
#define MIIM_LXT971_SR2_10FDX 0x2000 /* 10 Mbit full duplex selected */
#define MIIM_LXT971_SR2_100HDX 0x4000 /* 100 Mbit half duplex selected */
#define MIIM_LXT971_SR2_100FDX 0x8000 /* 100 Mbit full duplex selected */
#define MIIM_READ_COMMAND 0x00000001
#define MRBLR_INIT_SETTINGS PKTSIZE_ALIGN
......
......@@ -291,7 +291,7 @@
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
#undef CONFIG_MPC85XX_FEC
#define CONFIG_MPC85XX_FEC 1
#define FEC_PHY_ADDR 0
#define FEC_PHYIDX 0
......
......@@ -140,14 +140,13 @@
#define PHYS_SDRAM 0x20000000
#define PHYS_SDRAM_SIZE 0x1000000 /* 16 megs */
#define CFG_MEMTEST_START PHYS_SDRAM
#define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
#define CFG_MEMTEST_START PHYS_SDRAM
#define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
#define CONFIG_DRIVER_ETHER
#define CONFIG_NET_RETRY_COUNT 20
#define CONFIG_AT91C_USE_RMII
#define CONFIG_HAS_DATAFLASH 1
#define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
#define CFG_MAX_DATAFLASH_BANKS 2
#define CFG_MAX_DATAFLASH_PAGES 16384
......@@ -206,4 +205,48 @@ struct bd_info_ext {
#error CONFIG_USE_IRQ not supported
#endif
#define CFG_DEVICE_NULLDEV 1 /* enble null device */
#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n"
#define CONFIG_AUTOBOOT_STOP_STR "R" /* default password */
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
#define CONFIG_EXTRA_ENV_SETTINGS \
"net_nfs=tftp $(loadaddr) $(bootfile);run nfsargs addip addcons " \
"addmtd;bootm\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
"nfsroot=$(serverip):$(rootpath)\0" \
"net_cramfs=tftp $(loadaddr) $(bootfile); run flashargs addip " \
"addcons addmtd; bootm\0" \
"flash_cramfs=run flashargs addip addcons addmtd; bootm 10030000\0" \
"flashargs=setenv bootargs root=/dev/mtdblock3 ro\0" \
"addip=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):" \
"$(hostname)::off\0" \
"addcons=setenv bootargs $(bootargs) console=ttyS0,$(baudrate)\0" \
"addmtd=setenv bootargs $(bootargs) mtdparts=cmc_pu2:128k(uboot)ro," \
"64k(environment),768k(linux),4096k(root),-\0" \
"load=tftp $(loadaddr) $(loadfile)\0" \
"update=protect off 10000000 1001ffff;erase 10000000 1001ffff; " \
"cp.b $(loadaddr) 10000000 $(filesize);" \
"protect on 10000000 1001ffff\0" \
"updatel=era 10030000 100effff;tftp $(loadaddr) $(bootfile); " \
"cp.b $(loadaddr) 10030000 $(filesize)\0" \
"updatec=era 100f0000 104effff;tftp $(loadaddr) $(cramfsimage); " \
"cp.b $(loadaddr) 100f0000 $(filesize)\0" \
"updatej=era 104f0000 107fffff;tftp $(loadaddr) $(jffsimage); " \
"cp.b $(loadaddr) 104f0000 $(filesize)\0" \
"cramfsimage=cramfs_cmc-pu2.img\0" \
"jffsimage=jffs2_cmc-pu2.img\0" \
"loadfile=u-boot_cmc-pu2.bin\0" \
"bootfile=uImage_cmc-pu2\0" \
"loadaddr=0x20800000\0" \
"hostname=CMC-TC-PU2\0" \
"bootcmd=run dhcp_start;run flash_cramfs\0" \
"autoload=n\0" \
"dhcp_start=echo no DHCP\0" \
"ipaddr=192.168.0.190\0"
#endif /* __CONFIG_H */
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