- 12 Feb, 2009 3 commits
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Stefan Roese authored
Some AMCC eval boards do have a board_eth_init() function calling pci_eth_init(). These boards need to call cpu_eth_init() explicitly now with the new eth_init rework. Signed-off-by:
Stefan Roese <sr@denx.de>
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The criteria of the AMCC SDRAM Controller DDR autocalibration U-Boot code is to pick the largest passing write/read/compare window that also has the smallest SDRAM_RDCC.[RDSS] Read Sample Cycle Select value. On some Kilauea boards the DDR autocalibration algorithm can find a large passing write/read/compare window with a small SDRAM_RDCC.[RDSS] aggressive value of Read Sample Cycle Select value "T1 Sample". This SDRAM_RDCC.[RDSS] Read Sample Cycle Select value of "T1 Sample" proves to be to aggressive when later on U-Boot relocates into DDR memory and executes. The memory traces on the Kilauea board are short so on some Kilauea boards the SDRAM_RDCC.[RDSS] Read Sample Cycle Select value of "T1 Sample" shows up as a potentially valid value for the DDR autocalibratiion algorithm. The fix is to define a weak default function which provides the minimum SDRAM_RDCC.[RDSS] Read Sample Cycle Select value to accept for DDR autocalibration. The default will be the "T2 Sample" value. A board developer who has a well defined board and chooses to be more aggressive can always provide their own board specific string function with the more aggressive "T1 Sample" value or stick with the default minimum SDRAM_RDCC.[RDSS] value of "T2". Also put in a autocalibration loop fix for case where current write/read/compare passing window size is the same as a prior window size, then in this case choose the write/read/compare result that has the associated smallest RDCC T-Sample value. Signed-off-by:
Adam Graham <agraham@amcc.com> Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
CONFIG_SDRAM_PPC4xx_IBM_DDR2 is not set when include/asm-ppc/config.h is included. So for katmai, CONFIG_MAX_MEM_MAPPED will get set to 256MB. It makes perfect sense to set CONFIG_MAX_MEM_MAPPED to 2GB for all PPC4xx boards right now. Signed-off-by:
Stefan Roese <sr@denx.de>
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- 11 Feb, 2009 9 commits
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de>
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Signed-off-by:
Peter Tyser <ptyser@xes-inc.com>
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Signed-off-by:
Heiko Schocher <hs@denx.de>
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This patch adds the configuration option CONFIG_SYS_SMC_RXBUFLEN. With this option it is possible to allow the receive buffer for the SMC on 8xx to be greater then 1. In case CONFIG_SYS_SMC_RXBUFLEN == 1 this driver works as the old version. When defining CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE must be defined to setup the maximum idle timeout for the SMC. Signed-off-by:
Heiko Schocher <hs@denx.de>
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Move global '#ifdef CONFIG_xxx .... #endif' out of the .c files and into the COBJS-$(CONFIG_xxx) in the Makefile. Also delete unused var in kgdb code in the process. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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At some point an intentional double space at the end of the sentence got changed into a tab in the GPL header line: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the This patch fixes the damage. Signed-off-by:
Gerald Van Baren <vanbaren@cideas.com>
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If on your board is more than one flash, you must know the size of every single flash, for example, for updating the DTS before booting Linux. So make this function flash_get_info() extern, and you can have all info about your flashes. Signed-off-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Stefan Roese <sr@denx.de>
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- 10 Feb, 2009 5 commits
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Ben Warren authored
Added new CONFIG options for the three type of MAC-PHY interconnect and applied them all relevant board config files Signed-off-by:
Ben Warren <biggerbadderben@gmail.com>
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Mike Frysinger authored
Signed-off-by:
Mike Frysinger <vapier@gentoo.org> Signed-off-by:
Ben Warren <biggerbadderben@gmail.com>
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Andy Fleming authored
SOFT_RESET must be asserted for at least 3 TX clocks. Usually, that's about 30 clock cycles, so it's been mostly working. But we had no guarantee, and at slower bitrates, it's just over a microsecond (over 1000 clock cycles). This enforces a 2 microsecond gap between assertion and deassertion. Signed-off-by:
Andy Fleming <afleming@freescale.com> Signed-off-by:
Ben Warren <biggerbadderben@gmail.com>
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Simon Munton authored
100Mbs ethernet does not work on sh7763 chips due to the wrong value being used in the GECMR register. Following diff fixes the problem Signed-off-by:
Simon Munton <simon@nidoran.m5data.com> Signed-off-by:
Ben Warren <biggerbadderben@gmail.com>
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ksi@koi8.net authored
This fixes MPC8260 compilation with ethernet on SCC. Probably was a typo or something... Signed-off-by:
Sergey Kubushyn <ksi@koi8.net> Signed-off-by:
Ben Warren <biggerbadderben@gmail.com>
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- 09 Feb, 2009 14 commits
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Signed-off-by:
Heiko Schocher <hs@denx.de>
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This patch adds the configuration option CONFIG_SYS_SMC_RXBUFLEN. With this option it is possible to allow the receive buffer for the SMC on 82xx to be greater then 1. In case CONFIG_SYS_SMC_RXBUFLEN == 1 this driver works as the old version. When defining CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE must be defined to setup the maximum idle timeout for the SMC. Signed-off-by:
Heiko Schocher <hs@denx.de>
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If we call flush_cache(0xfffff000, 0x1000) it would never terminate the loop since end = 0xffffffff and we'd roll over our counter from 0xfffffe0 to 0 (assuming a 32-byte cache line) Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Moved CONFIG_MAX_MEM_MAPPED to the asm/config.h so its kept consistent between the two current users (lib_ppc/board.c, 44x SPD DDR2). Signed-off-by:
Kumar Gala <galak@kernel.crashing.org> Acked-by:
Stefan Roese <sr@denx.de>
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We have common defines that we duplicate in various ways. Having an arch specific config.h gives us a common location for those defines. Eventually we should be able to replace this when we have proper Kconfig support. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Now that the rest of u-boot can support it, change the PCI bus address of the PCI MEM regions from 0x80000000 to 0xc0000000, and use the same bus address for both PCI1 and PCI2. This will maximize the amount of PCI address space left over to map RAM on systems with large amounts of memory. Signed-off-by:
Becky Bruce <beckyb@kernel.crashing.org>
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The code assumes that the pci bus address and the virtual address used to access a region are the same, but they might not be. Fix this assumption. Signed-off-by:
Becky Bruce <beckyb@kernel.crashing.org>
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Signed-off-by:
Becky Bruce <beckyb@kernel.crashing.org>
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Clean up PCI mapping concepts in the 8641 config - rename _BASE to _BUS, as it's actually a PCI bus address, separate virtual and physical addresses into _VIRT and _PHYS, and use each appopriately. Signed-off-by:
Becky Bruce <beckyb@kernel.crashing.org>
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If CONFIG_ADDR_MAP is enabled, update the address map whenever we write a bat. Signed-off-by:
Becky Bruce <beckyb@kernel.crashing.org>
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The BAT fields are architected; there's no need for these to be in cpu-specific files. Drop the duplication and move these to include/asm-ppc/mmu.h. Also, remove the BL_xxx defines that were only used by the alaska board, and switch to using the BATU_BL_xxx defines used by all the other boards. The BL_ defines previously in use had to be shifted into the proper position for use, which was inefficient. Signed-off-by:
Becky Bruce <beckyb@kernel.crashing.org>
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It is no longer always true that the pci bus address can be used as the virtual address for pci accesses. pci_map_bar() is created to return the virtual address for a pci region. Signed-off-by:
Becky Bruce <beckyb@kernel.crashing.org>
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Because the inbound pci windows are mapped generously, set up the more specific outbound windows first. This way, when we search the pci regions for something, we will hit on the more specific region. This can actually be a problem on systems with large amounts of RAM. Signed-off-by:
Becky Bruce <beckyb@kernel.crashing.org>
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If the VA and PA of the flash aren't the same, the banks list should be initialized to hold the physical address. Correct this. Signed-off-by:
Becky Bruce <beckyb@kernel.crashing.org>
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- 07 Feb, 2009 9 commits
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When we search for an address match in pci_hose_{phys_to_bus,bus_to_phys} we should give preference to memory regions that aren't system memory. Its possible that we have over mapped system memory in the regions and we want to avoid depending on the order of the regions. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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The PCI_REGION_MEMORY and PCI_REGION_MEM are a bit to similar and can be confusing when reading the code. Rename PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY to clarify its used for system memory mapping purposes. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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