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    clk: clk_versaclock: Add support for versaclock driver · dcf2cee7
    Adam Ford authored and Tom Rini's avatar Tom Rini committed
    
    
    The driver is based on the Versaclock driver from the Linux code, but
    due differences in the clock API between them, some pieces had to be
    changed.
    
    This driver creates a mux, pfd, pll, and a series of fod ouputs.
     Rate               Usecnt      Name
    ------------------------------------------
     25000000             0        `-- x304-clock
     25000000             0            `-- clock-controller@6a.mux
     25000000             0                |-- clock-controller@6a.pfd
     2800000000           0                |   `-- clock-controller@6a.pll
     33333333             0                |       |-- clock-controller@6a.fod0
     33333333             0                |       |   `-- clock-controller@6a.out1
     33333333             0                |       |-- clock-controller@6a.fod1
     33333333             0                |       |   `-- clock-controller@6a.out2
     50000000             0                |       |-- clock-controller@6a.fod2
     50000000             0                |       |   `-- clock-controller@6a.out3
     125000000            0                |       `-- clock-controller@6a.fod3
     125000000            0                |           `-- clock-controller@6a.out4
     25000000             0                `-- clock-controller@6a.out0_sel_i2cb
    
    A translation function is added so the references to <&versaclock X> get routed
    to the corresponding clock-controller@6a.outX.
    
    Signed-off-by: default avatarAdam Ford <aford173@gmail.com>
    Reviewed-by: default avatarSean Anderson <sean.anderson@seco.com>
    dcf2cee7