Commit 6466b95e authored by Camelia Groza's avatar Camelia Groza Committed by Priyanka Jain
Browse files

board: freescale: t208xrdb: enable Power-On Reset for rev D boards



Starting with board revision D, the MISCCSR CPLD register needs to be
configured to enable Power-on Reset for software reset commands.
Signed-off-by: default avatarCamelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain's avatarPriyanka Jain <priyanka.jain@nxp.com>
parent 00ac37a9
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2014 Freescale Semiconductor
* Copyright 2021 NXP
*/
/*
......@@ -42,3 +43,6 @@ void cpld_write(unsigned int reg, u8 value);
/* RSTCON Register */
#define CPLD_RSTCON_EDC_RST 0x04
/* MISCCSR Register */
#define CPLD_MISC_POR_EN 0x30
......@@ -128,6 +128,13 @@ int misc_init_r(void)
reg |= CPLD_RSTCON_EDC_RST;
CPLD_WRITE(reset_ctl, reg);
/* Enable POR for boards revisions D and up */
if (get_hw_revision() >= 'D') {
reg = CPLD_READ(misc_csr);
reg |= CPLD_MISC_POR_EN;
CPLD_WRITE(misc_csr, reg);
}
return 0;
}
......
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